fix: linter

README.md

@@ -14,9 +14,8 @@ NovaOS is a expository project where I build a kernel from scratch for a Raspber
 - Communicate with peripherals via mailboxes ✓
 - Frame Buffer ✓
 - Heap Memory allocation ✓
-- MMU ✓
+- MMU
 - SVC instructions
-- Kernel Independent Applications
 - Multi Core
 - Dynamic clock speed
 - Multiprocessing

link.ld

@@ -4,43 +4,53 @@ SECTIONS {
     .text ALIGN(4) : {
         KEEP(*(.text._start))
         *(.text .text.*)
-        . = ALIGN(4K);
-        __text_end = .;
     }
 
     .rodata : {
         *(.rodata .rodata.*)
     }
 
-    .data  : {
+    .data ALIGN(2M) : {
+        _data = .;
         *(.data .data.*)
     }
 
-    .bss ALIGN(16) (NOLOAD) : {
+    .bss (NOLOAD) : {
+        . = ALIGN(16);
         __bss_start = .;
         *(.bss .bss.*)
+        *(COMMON)
         __bss_end = .;
     }
 
-    . = ALIGN(2M);
+    .vector_table ALIGN(2048) : {
-
-    __share_end = .;
-
-    .vector_table ALIGN(2K) : {
         KEEP(*(.vector_table))
     }
 
-    # EL2 Stack
+    .heap ALIGN(16): {
+    __heap_start = .;
+    . += 100K; #100kB
+    __heap_end = .;
+    }
+
     .stack ALIGN(16): {
     __stack_start = .;
-    . += 100K; #100kB stack
+    . += 10K; #10kB stack
-    . = ALIGN(16);
     __stack_end = .;
     }
 
     . = ALIGN(2M);
 
     __kernel_end = .;
+
+    .stack_el0 : {
+    __stack_start_el0 = .;
+    . += 10K; #10kB stack
+    __stack_end_el0 = .;
+    }
+
+    . = ALIGN(2M);
+    _end = .;
 }
 
 __bss_size = (__bss_end - __bss_start) >> 3;

src/aarch64/mmu.rs

@@ -1,12 +1,13 @@
-use core::mem::size_of;
+use core::panic;
+
 use nova_error::NovaError;
 
-use crate::{
+unsafe extern "C" {
-    aarch64::mmu::physical_mapping::{
+    static mut __translation_table_l2_start: u64;
-        reserve_block, reserve_block_explicit, reserve_page, reserve_page_explicit,
+    static __stack_start_el0: u64;
-    },
+    static __kernel_end: u64;
-    get_current_el,
+    static _data: u64;
-};
+}
 
 const BLOCK: u64 = 0b01;
 const TABLE: u64 = 0b11;
@@ -41,109 +42,126 @@ pub const LEVEL2_BLOCK_SIZE: usize = TABLE_ENTRY_COUNT * GRANULARITY;
 const L2_BLOCK_BITMAP_WORDS: usize = LEVEL2_BLOCK_SIZE / (64 * GRANULARITY);
 
 const MAX_PAGE_COUNT: usize = 1024 * 1024 * 1024 / GRANULARITY;
-
-const TRANSLATION_TABLE_BASE_ADDR: usize = 0xFFFF_FF82_0000_0000;
-pub const KERNEL_VIRTUAL_MEM_SPACE: usize = 0xFFFF_FF80_0000_0000;
-
-pub const STACK_START_ADDR: usize = !KERNEL_VIRTUAL_MEM_SPACE & (!0xF);
-
-mod physical_mapping;
-
-type VirtAddr = usize;
-type PhysAddr = usize;
-
-pub enum PhysSource {
-    Any,
-    Explicit(PhysAddr),
-}
-
 #[repr(align(4096))]
 pub struct PageTable([u64; TABLE_ENTRY_COUNT]);
 
 #[no_mangle]
 pub static mut TRANSLATIONTABLE_TTBR0: PageTable = PageTable([0; 512]);
-#[no_mangle]
+
-pub static mut TRANSLATIONTABLE_TTBR1: PageTable = PageTable([0; 512]);
+static mut PAGING_BITMAP: [u64; MAX_PAGE_COUNT / 64] = [0; MAX_PAGE_COUNT / 64];
 
 /// Allocate a memory block of `size` starting at `virtual_address`.
 pub fn allocate_memory(
-    virtual_address: usize,
+    mut virtual_address: usize,
-    size_bytes: usize,
+    mut size: usize,
-    phys: PhysSource,
+    additional_flags: u64,
-    flags: u64,
 ) -> Result<(), NovaError> {
     if !virtual_address.is_multiple_of(GRANULARITY) {
         return Err(NovaError::Misalignment);
     }
-    if !size_bytes.is_multiple_of(GRANULARITY) {
+
+    let level1_blocks = size / LEVEL1_BLOCK_SIZE;
+    size %= LEVEL1_BLOCK_SIZE;
+    let level2_blocks = size / LEVEL2_BLOCK_SIZE;
+    size %= LEVEL2_BLOCK_SIZE;
+    let level3_pages = size / GRANULARITY;
+    if !size.is_multiple_of(GRANULARITY) {
         return Err(NovaError::InvalidGranularity);
     }
 
-    let base_table = if virtual_address & KERNEL_VIRTUAL_MEM_SPACE > 0 {
+    if level1_blocks > 0 {
-        core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR1)
+        todo!("Currently not supported");
-    } else {
-        core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0)
-    };
-
-    match phys {
-        PhysSource::Any => map_range_dynamic(virtual_address, size_bytes, base_table, flags),
-        PhysSource::Explicit(phys_addr) => {
-            map_range_explicit(virtual_address, phys_addr, size_bytes, base_table, flags)
-        }
-    }
-}
-
-fn map_range_explicit(
-    mut virt: VirtAddr,
-    mut phys: PhysAddr,
-    size_bytes: usize,
-    base: *mut PageTable,
-    flags: u64,
-) -> Result<(), NovaError> {
-    let mut remaining = size_bytes;
-
-    while virt % LEVEL2_BLOCK_SIZE != 0 {
-        map_page(virt, phys, base, flags)?;
-        (virt, _) = virt.overflowing_add(GRANULARITY);
-        phys += GRANULARITY;
-        remaining -= GRANULARITY;
     }
 
-    while remaining >= LEVEL2_BLOCK_SIZE {
+    for _ in 0..level2_blocks {
-        map_l2_block(virt, phys, base, flags)?;
+        alloc_block_l2(
-        (virt, _) = virt.overflowing_add(LEVEL2_BLOCK_SIZE);
+            virtual_address,
-        phys += LEVEL2_BLOCK_SIZE;
+            core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
-        remaining -= LEVEL2_BLOCK_SIZE;
+            additional_flags,
+        )?;
+        virtual_address += LEVEL2_BLOCK_SIZE;
     }
-
+    for _ in 0..level3_pages {
-    while remaining > 0 {
+        alloc_page(
-        map_page(virt, phys, base, flags)?;
+            virtual_address,
-        (virt, _) = virt.overflowing_add(GRANULARITY);
+            core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
-        phys += GRANULARITY;
+            additional_flags,
-        remaining -= GRANULARITY;
+        )?;
+        virtual_address += GRANULARITY;
     }
 
     Ok(())
 }
 
-fn map_range_dynamic(
+/// Allocate a memory block of `size` starting at `virtual_address`,
-    mut virt: PhysAddr,
+/// with explicit physical_address.
-    size_bytes: usize,
+///
-    base: *mut PageTable,
+/// Note: This can be used when mapping predefined regions.
-    flags: u64,
+pub fn allocate_memory_explicit(
+    mut virtual_address: usize,
+    mut size: usize,
+    mut physical_address: usize,
+    additional_flags: u64,
 ) -> Result<(), NovaError> {
-    let mut remaining = size_bytes;
+    if !virtual_address.is_multiple_of(GRANULARITY) {
-
+        return Err(NovaError::Misalignment);
-    while remaining >= LEVEL2_BLOCK_SIZE {
-        map_l2_block(virt, reserve_block(), base, flags)?;
-        (virt, _) = virt.overflowing_add(LEVEL2_BLOCK_SIZE);
-        remaining -= LEVEL2_BLOCK_SIZE;
     }
 
-    while remaining > 0 {
+    let level1_blocks = size / LEVEL1_BLOCK_SIZE;
-        map_page(virt, reserve_page(), base, flags)?;
+    size %= LEVEL1_BLOCK_SIZE;
-        (virt, _) = virt.overflowing_add(GRANULARITY);
+    let mut level2_blocks = size / LEVEL2_BLOCK_SIZE;
-        remaining -= GRANULARITY;
+    size %= LEVEL2_BLOCK_SIZE;
+    let mut level3_pages = size / GRANULARITY;
+    if !size.is_multiple_of(GRANULARITY) {
+        return Err(NovaError::InvalidGranularity);
+    }
+
+    if level1_blocks > 0 {
+        todo!("Currently not supported");
+    }
+
+    let l2_alignment = (physical_address % LEVEL2_BLOCK_SIZE) / GRANULARITY;
+    if l2_alignment != 0 {
+        let l3_diff = LEVEL2_BLOCK_SIZE / GRANULARITY - l2_alignment;
+        if l3_diff > level3_pages {
+            level2_blocks -= 1;
+            level3_pages += TABLE_ENTRY_COUNT;
+        }
+
+        level3_pages -= l3_diff;
+
+        for _ in 0..l3_diff {
+            alloc_page_explicit(
+                virtual_address,
+                physical_address,
+                core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
+                additional_flags,
+            )?;
+
+            virtual_address += GRANULARITY;
+            physical_address += GRANULARITY;
+        }
+    }
+
+    for _ in 0..level2_blocks {
+        alloc_block_l2_explicit(
+            virtual_address,
+            physical_address,
+            core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
+            additional_flags,
+        )?;
+        virtual_address += LEVEL2_BLOCK_SIZE;
+        physical_address += LEVEL2_BLOCK_SIZE;
+    }
+    for _ in 0..level3_pages {
+        alloc_page_explicit(
+            virtual_address,
+            physical_address,
+            core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
+            additional_flags,
+        )?;
+        virtual_address += GRANULARITY;
+        physical_address += GRANULARITY;
     }
 
     Ok(())
@@ -179,7 +197,7 @@ pub fn alloc_page_explicit(
     )
 }
 
-pub fn map_page(
+fn map_page(
     virtual_address: usize,
     physical_address: usize,
     base_table_ptr: *mut PageTable,
@@ -201,6 +219,20 @@ pub fn map_page(
     Ok(())
 }
 
+// Allocate a level 2 block.
+pub fn alloc_block_l2(
+    virtual_addr: usize,
+    base_table_ptr: *mut PageTable,
+    additional_flags: u64,
+) -> Result<(), NovaError> {
+    map_l2_block(
+        virtual_addr,
+        reserve_block(),
+        base_table_ptr,
+        additional_flags,
+    )
+}
+
 // Allocate a level 2 block, at a explicit `physical_address`.
 pub fn alloc_block_l2_explicit(
     virtual_addr: usize,
@@ -245,10 +277,10 @@ pub fn map_l2_block(
     Ok(())
 }
 
-pub fn reserve_range(
+pub fn reserve_range_explicit(
-    start_physical_address: PhysAddr,
+    start_physical_address: usize,
-    end_physical_address: PhysAddr,
+    end_physical_address: usize,
-) -> Result<PhysAddr, NovaError> {
+) -> Result<(), NovaError> {
     let mut size = end_physical_address - start_physical_address;
     let l1_blocks = size / LEVEL1_BLOCK_SIZE;
     size %= LEVEL1_BLOCK_SIZE;
@@ -275,7 +307,57 @@ pub fn reserve_range(
         addr += GRANULARITY;
     }
 
-    Ok(start_physical_address)
+    Ok(())
+}
+
+fn reserve_page() -> usize {
+    if let Some(address) = find_unallocated_page() {
+        let page = address / GRANULARITY;
+        let word_index = page / 64;
+        unsafe { PAGING_BITMAP[word_index] |= 1 << (page % 64) };
+        return address;
+    }
+    panic!("Out of Memory!");
+}
+
+fn reserve_page_explicit(physical_address: usize) -> Result<(), NovaError> {
+    let page = physical_address / GRANULARITY;
+    let word_index = page / 64;
+
+    if unsafe { PAGING_BITMAP[word_index] } & (1 << (page % 64)) > 0 {
+        return Err(NovaError::Paging);
+    }
+
+    unsafe { PAGING_BITMAP[word_index] |= 1 << (page % 64) };
+    Ok(())
+}
+
+fn reserve_block() -> usize {
+    if let Some(start) = find_contiguous_free_bitmap_words(L2_BLOCK_BITMAP_WORDS) {
+        for j in 0..L2_BLOCK_BITMAP_WORDS {
+            unsafe { PAGING_BITMAP[start + j] = u64::MAX };
+        }
+        return start * 64 * GRANULARITY;
+    }
+
+    panic!("Out of Memory!");
+}
+
+fn reserve_block_explicit(physical_address: usize) -> Result<(), NovaError> {
+    let page = physical_address / GRANULARITY;
+    for i in 0..L2_BLOCK_BITMAP_WORDS {
+        unsafe {
+            if PAGING_BITMAP[(page / 64) + i] != 0 {
+                return Err(NovaError::Paging);
+            }
+        };
+    }
+    for i in 0..L2_BLOCK_BITMAP_WORDS {
+        unsafe {
+            PAGING_BITMAP[(page / 64) + i] = u64::MAX;
+        };
+    }
+    Ok(())
 }
 
 fn create_block_descriptor_entry(physical_address: usize, additional_flags: u64) -> u64 {
@@ -299,22 +381,35 @@ fn create_table_descriptor_entry(addr: usize) -> u64 {
 }
 
 fn virtual_address_to_table_offset(virtual_addr: usize) -> (usize, usize, usize) {
-    let absolute_page_off = (virtual_addr & !KERNEL_VIRTUAL_MEM_SPACE) / GRANULARITY;
+    let absolute_page_off = virtual_addr / GRANULARITY;
     let l3_off = absolute_page_off % TABLE_ENTRY_COUNT;
     let l2_off = (absolute_page_off / TABLE_ENTRY_COUNT) % TABLE_ENTRY_COUNT;
     let l1_off = (absolute_page_off / TABLE_ENTRY_COUNT / TABLE_ENTRY_COUNT) % TABLE_ENTRY_COUNT;
     (l1_off, l2_off, l3_off)
 }
 
+/// Debugging function to navigate the translation tables.
+#[allow(unused_variables)]
+pub fn sim_l3_access(addr: usize) {
+    unsafe {
+        let entry1 = TRANSLATIONTABLE_TTBR0.0[addr / LEVEL1_BLOCK_SIZE];
+        let table2 = &mut *(entry_phys(entry1) as *mut PageTable);
+        let entry2 = table2.0[(addr % LEVEL1_BLOCK_SIZE) / LEVEL2_BLOCK_SIZE];
+        let table3 = &mut *(entry_phys(entry2) as *mut PageTable);
+        let _entry3 = table3.0[(addr % LEVEL2_BLOCK_SIZE) / GRANULARITY];
+    }
+}
+
 /// Navigate the table tree, by following given offsets. This function
 /// allocates new tables if required.
 fn navigate_table(
     initial_table_ptr: *mut PageTable,
     offsets: &[usize],
 ) -> Result<*mut PageTable, NovaError> {
+    let root_table_ptr = initial_table_ptr;
     let mut table = initial_table_ptr;
     for offset in offsets {
-        table = next_table(table, *offset)?;
+        table = next_table(table, *offset, root_table_ptr)?;
     }
     Ok(table)
 }
@@ -322,45 +417,70 @@ fn navigate_table(
 /// Get the next table one level down.
 ///
 /// If table doesn't exit a page will be allocated for it.
-fn next_table(table_ptr: *mut PageTable, offset: usize) -> Result<*mut PageTable, NovaError> {
+fn next_table(
+    table_ptr: *mut PageTable,
+    offset: usize,
+    root_table_ptr: *mut PageTable,
+) -> Result<*mut PageTable, NovaError> {
     let table = unsafe { &mut *table_ptr };
     match table.0[offset] & 0b11 {
         0 => {
-            let new_phys_page_table_address = reserve_page();
+            let new_table_addr = reserve_page();
+
+            table.0[offset] = create_table_descriptor_entry(new_table_addr);
 
-            table.0[offset] = create_table_descriptor_entry(new_phys_page_table_address);
             map_page(
-                phys_table_to_kernel_space(new_phys_page_table_address),
+                new_table_addr,
-                new_phys_page_table_address,
+                new_table_addr,
-                &raw mut TRANSLATIONTABLE_TTBR1,
+                unsafe { &mut *root_table_ptr },
                 NORMAL_MEM | WRITABLE | PXN | UXN,
             )?;
 
-            Ok(entry_table_addr(table.0[offset] as usize) as *mut PageTable)
+            Ok(entry_phys(table.0[offset]) as *mut PageTable)
         }
         1 => Err(NovaError::Paging),
-        3 => Ok(entry_table_addr(table.0[offset] as usize) as *mut PageTable),
+        3 => Ok(entry_phys(table.0[offset]) as *mut PageTable),
         _ => unreachable!(),
     }
 }
 
+fn find_unallocated_page() -> Option<usize> {
+    for (i, entry) in unsafe { PAGING_BITMAP }.iter().enumerate() {
+        if *entry != u64::MAX {
+            for offset in 0..64 {
+                if entry >> offset & 0b1 == 0 {
+                    return Some((i * 64 + offset) * GRANULARITY);
+                }
+            }
+        }
+    }
+    None
+}
+
+fn find_contiguous_free_bitmap_words(required_words: usize) -> Option<usize> {
+    let mut run_start = 0;
+    let mut run_len = 0;
+
+    for (i, entry) in unsafe { PAGING_BITMAP }.iter().enumerate() {
+        if *entry == 0 {
+            if run_len == 0 {
+                run_start = i;
+            }
+            run_len += 1;
+
+            if run_len == required_words {
+                return Some(run_start);
+            }
+        } else {
+            run_len = 0;
+        }
+    }
+
+    None
+}
+
 /// Extracts the physical address out of an table entry.
 #[inline]
-fn entry_phys(entry: usize) -> PhysAddr {
+fn entry_phys(entry: u64) -> u64 {
     entry & 0x0000_FFFF_FFFF_F000
 }
-
-#[inline]
-fn entry_table_addr(entry: usize) -> VirtAddr {
-    if get_current_el() == 1 {
-        phys_table_to_kernel_space(entry_phys(entry))
-    } else {
-        entry_phys(entry)
-    }
-}
-
-/// Extracts the physical address out of an table entry.
-#[inline]
-fn phys_table_to_kernel_space(entry: usize) -> VirtAddr {
-    entry | TRANSLATION_TABLE_BASE_ADDR
-}

src/aarch64/mmu/physical_mapping.rs

@@ -1,89 +0,0 @@
-use crate::aarch64::mmu::{PhysAddr, GRANULARITY, L2_BLOCK_BITMAP_WORDS, MAX_PAGE_COUNT};
-use nova_error::NovaError;
-
-static mut PAGING_BITMAP: [u64; MAX_PAGE_COUNT / 64] = [0; MAX_PAGE_COUNT / 64];
-
-pub fn reserve_page() -> PhysAddr {
-    if let Some(address) = find_unallocated_page() {
-        let page = address / GRANULARITY;
-        let word_index = page / 64;
-        unsafe { PAGING_BITMAP[word_index] |= 1 << (page % 64) };
-        return address;
-    }
-    panic!("Out of Memory!");
-}
-
-pub fn reserve_page_explicit(physical_address: usize) -> Result<PhysAddr, NovaError> {
-    let page = physical_address / GRANULARITY;
-    let word_index = page / 64;
-
-    if unsafe { PAGING_BITMAP[word_index] } & (1 << (page % 64)) > 0 {
-        return Err(NovaError::Paging);
-    }
-
-    unsafe { PAGING_BITMAP[word_index] |= 1 << (page % 64) };
-    Ok(physical_address)
-}
-
-pub fn reserve_block() -> usize {
-    if let Some(start) = find_contiguous_free_bitmap_words(L2_BLOCK_BITMAP_WORDS) {
-        for j in 0..L2_BLOCK_BITMAP_WORDS {
-            unsafe { PAGING_BITMAP[start + j] = u64::MAX };
-        }
-        return start * 64 * GRANULARITY;
-    }
-
-    panic!("Out of Memory!");
-}
-
-pub fn reserve_block_explicit(physical_address: usize) -> Result<(), NovaError> {
-    let page = physical_address / GRANULARITY;
-    for i in 0..L2_BLOCK_BITMAP_WORDS {
-        unsafe {
-            if PAGING_BITMAP[(page / 64) + i] != 0 {
-                return Err(NovaError::Paging);
-            }
-        };
-    }
-    for i in 0..L2_BLOCK_BITMAP_WORDS {
-        unsafe {
-            PAGING_BITMAP[(page / 64) + i] = u64::MAX;
-        };
-    }
-    Ok(())
-}
-
-fn find_unallocated_page() -> Option<usize> {
-    for (i, entry) in unsafe { PAGING_BITMAP }.iter().enumerate() {
-        if *entry != u64::MAX {
-            for offset in 0..64 {
-                if entry >> offset & 0b1 == 0 {
-                    return Some((i * 64 + offset) * GRANULARITY);
-                }
-            }
-        }
-    }
-    None
-}
-
-fn find_contiguous_free_bitmap_words(required_words: usize) -> Option<usize> {
-    let mut run_start = 0;
-    let mut run_len = 0;
-
-    for (i, entry) in unsafe { PAGING_BITMAP }.iter().enumerate() {
-        if *entry == 0 {
-            if run_len == 0 {
-                run_start = i;
-            }
-            run_len += 1;
-
-            if run_len == required_words {
-                return Some(run_start);
-            }
-        } else {
-            run_len = 0;
-        }
-    }
-
-    None
-}

src/aarch64/registers.rs

@@ -50,9 +50,9 @@ psr!(ESR_EL1, u32);
 
 psr!(SPSR_EL1, u32);
 
-psr!(ELR_EL1, u64);
+psr!(ELR_EL1, u32);
 
-psr!(SCTLR_EL1, u64);
+psr!(SCTLR_EL1, u32);
 
 pub fn read_exception_source_el() -> u32 {
     read_spsr_el1() & 0b1111

src/config.S

@@ -1,194 +0,0 @@
-.section .text.config
-.align 4
-.global el2_to_el1
-el2_to_el1:
-    mov x0, #(1 << 31)
-    msr HCR_EL2, x0
-
-    // Set SPSR_EL2: return to EL1h
-    mov x0, #(0b0101)
-    msr SPSR_EL2, x0
-
-    // Set return address to kernel_main
-    adrp x0, kernel_main
-    add  x0, x0, :lo12:kernel_main
-    msr ELR_EL2, x0
-
-    // Set SP_EL1 to stack base
-    adrp x0, EL1_STACK_TOP
-    ldr  x1, [x0, :lo12:EL1_STACK_TOP]
-    msr SP_EL1, x1
-
-    // Set VBAR_EL1 to vector table
-    adrp x0, vector_table
-    add  x0, x0, :lo12:vector_table
-    msr VBAR_EL1, x0
-
-    isb
-
-    adrp x0, SCTLR_EL1_CONF
-    ldr  x1, [x0, :lo12:SCTLR_EL1_CONF]
-    msr SCTLR_EL1, x1
-
-    isb
-
-    // SIMD should not be trapped
-    mrs x0, CPACR_EL1
-    mov x1, #(0b11<<20)
-    orr x0,x0, x1
-    msr CPACR_EL1,x0
-
-    isb
-
-    // Return to EL1
-    eret
-
-.section .text.config
-.align 4
-.global configure_mmu_el1
-configure_mmu_el1:
-    // Configure MMU
-    adrp x0, TCR_EL1_CONF
-    ldr  x1, [x0, :lo12:TCR_EL1_CONF]
-    msr TCR_EL1, x1
-    isb
-
-    // MAIR0: Normal Mem.
-    // MAIR1: Device Mem.
-    mov x0, #0x04FF
-    msr MAIR_EL1, x0
-    isb
-
-    // Configure translation table
-    adrp x0, TRANSLATIONTABLE_TTBR0
-    add  x1, x0, :lo12:TRANSLATIONTABLE_TTBR0
-    msr TTBR0_EL1, x1
-
-    adrp x0, TRANSLATIONTABLE_TTBR1
-    add  x1, x0, :lo12:TRANSLATIONTABLE_TTBR1
-    msr TTBR1_EL1, x1
-
-    tlbi vmalle1
-    dsb ish
-    isb
-
-    ret
-
-.align 4
-.global el1_to_el0
-el1_to_el0:
-
-    // Set SPSR_EL1: return to EL0t
-    mov x0, #(0b0000)
-    msr SPSR_EL1, x0
-
-    // Set return address to el0
-    ldr x0, =el0
-    msr ELR_EL1, x0
-
-    // Set SP_EL1 to stack base
-    adrp x0, EL0_STACK_TOP
-    ldr  x1, [x0, :lo12:EL0_STACK_TOP]
-    msr SP_EL0, x1
-
-    isb
-
-    // Return to EL0
-    eret
-
-
-.align 4
-irq_handler:
-    sub sp, sp, #176
-    stp x0, x1, [sp, #0]
-    stp x2, x3, [sp, #16]
-    stp x4, x5, [sp, #32]
-    stp x6, x7, [sp, #48]
-    stp x8, x9, [sp, #64]
-    stp x10, x11, [sp, #80]
-    stp x12, x13, [sp, #96]
-    stp x14, x15, [sp, #112]
-    stp x16, x17, [sp, #128]
-    stp x18, x29, [sp, #144]
-    stp x30, xzr, [sp, #160]
-
-    bl rust_irq_handler
-
-    ldp x0, x1, [sp, #0]
-    ldp x2, x3, [sp, #16]
-    ldp x4, x5, [sp, #32]
-    ldp x6, x7, [sp, #48]
-    ldp x8, x9, [sp, #64]
-    ldp x10, x11, [sp, #80]
-    ldp x12, x13, [sp, #96]
-    ldp x14, x15, [sp, #112]
-    ldp x16, x17, [sp, #128]
-    ldp x18, x29, [sp, #144]
-    ldp x30, xzr, [sp, #160]
-    add sp, sp, #176
-
-    eret
-
-.align 4
-synchronous_interrupt_imm_lower_aarch64:
-    sub sp, sp, #176
-    stp x0, x1, [sp, #0]
-    stp x2, x3, [sp, #16]
-    stp x4, x5, [sp, #32]
-    stp x6, x7, [sp, #48]
-    stp x8, x9, [sp, #64]
-    stp x10, x11, [sp, #80]
-    stp x12, x13, [sp, #96]
-    stp x14, x15, [sp, #112]
-    stp x16, x17, [sp, #128]
-    stp x18, x29, [sp, #144]
-    stp x30, xzr, [sp, #160]
-
-    bl rust_synchronous_interrupt_imm_lower_aarch64
-
-    ldp x0, x1, [sp, #0]
-    ldp x2, x3, [sp, #16]
-    ldp x4, x5, [sp, #32]
-    ldp x6, x7, [sp, #48]
-    ldp x8, x9, [sp, #64]
-    ldp x10, x11, [sp, #80]
-    ldp x12, x13, [sp, #96]
-    ldp x14, x15, [sp, #112]
-    ldp x16, x17, [sp, #128]
-    ldp x18, x29, [sp, #144]
-    ldp x30, xzr, [sp, #160]
-    add sp, sp, #176
-
-    eret
-
-.align 4
-synchronous_interrupt_no_el_change:
-    sub sp, sp, #176
-    stp x0, x1, [sp, #0]
-    stp x2, x3, [sp, #16]
-    stp x4, x5, [sp, #32]
-    stp x6, x7, [sp, #48]
-    stp x8, x9, [sp, #64]
-    stp x10, x11, [sp, #80]
-    stp x12, x13, [sp, #96]
-    stp x14, x15, [sp, #112]
-    stp x16, x17, [sp, #128]
-    stp x18, x29, [sp, #144]
-    stp x30, xzr, [sp, #160]
-
-    bl rust_synchronous_interrupt_no_el_change
-
-    ldp x0, x1, [sp, #0]
-    ldp x2, x3, [sp, #16]
-    ldp x4, x5, [sp, #32]
-    ldp x6, x7, [sp, #48]
-    ldp x8, x9, [sp, #64]
-    ldp x10, x11, [sp, #80]
-    ldp x12, x13, [sp, #96]
-    ldp x14, x15, [sp, #112]
-    ldp x16, x17, [sp, #128]
-    ldp x18, x29, [sp, #144]
-    ldp x30, xzr, [sp, #160]
-    add sp, sp, #176
-
-    eret

src/configuration.rs

@@ -23,107 +23,72 @@ const SH0: u64 = 0b11 << 12; // Inner shareable
 
 const TG1: u64 = 0b10 << 30; // 4KB granularity EL1
 const T1SZ: u64 = 25 << 16; // 25 Bits of TTBR select -> 39 Bits of VA
+const EPD1: u64 = 0b1 << 23; // Trigger translation fault when using TTBR1_EL1
 const SH1: u64 = 0b11 << 28; // Inner sharable
 
 const IPS: u64 = 0b000 << 32; // 32 bits of PA space -> up to 4GiB
 const AS: u64 = 0b1 << 36; // configure an ASID size of 16 bits
 
 #[no_mangle]
-pub static TCR_EL1_CONF: u64 = IPS | TG0 | TG1 | T0SZ | T1SZ | SH0 | SH1 | AS;
+pub static TCR_EL1_CONF: u64 = IPS | TG0 | TG1 | T0SZ | T1SZ | SH0 | SH1 | EPD1 | AS;
 
 pub mod mmu {
+
     use crate::{
         aarch64::mmu::{
-            alloc_block_l2_explicit, allocate_memory, map_l2_block, map_page, reserve_range,
+            alloc_block_l2_explicit, map_l2_block, reserve_range_explicit, DEVICE_MEM,
-            PhysSource, DEVICE_MEM, EL0_ACCESSIBLE, GRANULARITY, KERNEL_VIRTUAL_MEM_SPACE,
+            EL0_ACCESSIBLE, LEVEL1_BLOCK_SIZE, LEVEL2_BLOCK_SIZE, NORMAL_MEM, PXN, READ_ONLY,
-            LEVEL1_BLOCK_SIZE, LEVEL2_BLOCK_SIZE, NORMAL_MEM, PXN, READ_ONLY, STACK_START_ADDR,
             TRANSLATIONTABLE_TTBR0, UXN, WRITABLE,
         },
         PERIPHERAL_BASE,
     };
-
-    #[no_mangle]
-    static EL1_STACK_TOP: usize = STACK_START_ADDR | KERNEL_VIRTUAL_MEM_SPACE;
-    const EL1_STACK_SIZE: usize = LEVEL2_BLOCK_SIZE * 2;
-    #[no_mangle]
-    static EL0_STACK_TOP: usize = STACK_START_ADDR;
-    const EL0_STACK_SIZE: usize = LEVEL2_BLOCK_SIZE * 2;
     extern "C" {
-        static __text_end: u64;
+        static _data: u64;
-        static __share_end: u64;
+        static _end: u64;
         static __kernel_end: u64;
     }
 
     pub fn initialize_mmu_translation_tables() {
-        let text_end = unsafe { &__text_end } as *const _ as usize;
+        let shared_segment_end = unsafe { &_data } as *const _ as usize;
-        let shared_segment_end = unsafe { &__share_end } as *const _ as usize;
         let kernel_end = unsafe { &__kernel_end } as *const _ as usize;
+        let user_space_end = unsafe { &_end } as *const _ as usize;
 
-        reserve_range(0x0, kernel_end).unwrap();
+        reserve_range_explicit(0x0, user_space_end).unwrap();
 
-        for addr in (0..text_end).step_by(GRANULARITY) {
+        for addr in (0..shared_segment_end).step_by(LEVEL2_BLOCK_SIZE) {
-            map_page(
+            let _ = map_l2_block(
                 addr,
                 addr,
                 core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
                 EL0_ACCESSIBLE | READ_ONLY | NORMAL_MEM,
-            )
+            );
-            .unwrap();
-        }
-
-        for addr in (text_end..shared_segment_end).step_by(GRANULARITY) {
-            map_page(
-                addr,
-                addr,
-                core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
-                EL0_ACCESSIBLE | WRITABLE | NORMAL_MEM,
-            )
-            .unwrap();
         }
 
         for addr in (shared_segment_end..kernel_end).step_by(LEVEL2_BLOCK_SIZE) {
-            map_l2_block(
+            let _ = map_l2_block(
                 addr,
                 addr,
                 core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
                 WRITABLE | UXN | NORMAL_MEM,
-            )
+            );
-            .unwrap();
+        }
+
+        for addr in (kernel_end..user_space_end).step_by(LEVEL2_BLOCK_SIZE) {
+            let _ = map_l2_block(
+                addr,
+                addr,
+                core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
+                EL0_ACCESSIBLE | WRITABLE | PXN | NORMAL_MEM,
+            );
         }
 
         for addr in (PERIPHERAL_BASE..LEVEL1_BLOCK_SIZE).step_by(LEVEL2_BLOCK_SIZE) {
-            alloc_block_l2_explicit(
+            let _ = alloc_block_l2_explicit(
                 addr,
                 addr,
                 core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
                 EL0_ACCESSIBLE | WRITABLE | UXN | PXN | DEVICE_MEM,
-            )
+            );
-            .unwrap();
         }
-
-        // Frame Buffer memory range
-        allocate_memory(
-            0x3c100000,
-            1080 * 1920 * 4,
-            PhysSource::Explicit(0x3c100000),
-            NORMAL_MEM | PXN | UXN | WRITABLE | EL0_ACCESSIBLE,
-        )
-        .unwrap();
-
-        allocate_memory(
-            EL1_STACK_TOP - EL1_STACK_SIZE + 0x10,
-            EL1_STACK_SIZE,
-            PhysSource::Any,
-            WRITABLE | NORMAL_MEM,
-        )
-        .unwrap();
-
-        allocate_memory(
-            EL0_STACK_TOP - EL0_STACK_SIZE + 0x10,
-            EL0_STACK_SIZE,
-            PhysSource::Any,
-            WRITABLE | EL0_ACCESSIBLE | NORMAL_MEM,
-        )
-        .unwrap();
     }
 }

src/framebuffer.rs

@@ -41,7 +41,7 @@ impl FrameBuffer {
             return;
         }
         unsafe {
-            write_volatile(self.start_addr.add(offset as usize), color);
+            write_volatile(self.start_addr.byte_add(4 * offset as usize), color);
         }
     }
 

src/lib.rs

@@ -12,31 +12,24 @@ use core::{
 
 use heap::Heap;
 
-use crate::{
+use crate::{interrupt_handlers::initialize_interrupt_handler, logger::DefaultLogger};
-    aarch64::mmu::{
-        allocate_memory, PhysSource, KERNEL_VIRTUAL_MEM_SPACE, LEVEL2_BLOCK_SIZE, NORMAL_MEM, UXN,
-        WRITABLE,
-    },
-    interrupt_handlers::initialize_interrupt_handler,
-    logger::DefaultLogger,
-};
 
 static PERIPHERAL_BASE: usize = 0x3F00_0000;
 
 unsafe extern "C" {
-    unsafe static mut __kernel_end: u8;
+    unsafe static mut __heap_start: u8;
+    unsafe static mut __heap_end: u8;
 }
 
 #[global_allocator]
 pub static mut GLOBAL_ALLOCATOR: Heap = Heap::empty();
 
-pub unsafe fn init_kernel_heap() {
+pub unsafe fn init_heap() {
-    let start = core::ptr::addr_of_mut!(__kernel_end) as usize | KERNEL_VIRTUAL_MEM_SPACE;
+    let start = core::ptr::addr_of_mut!(__heap_start) as usize;
-    let size = LEVEL2_BLOCK_SIZE * 2;
+    let end = core::ptr::addr_of_mut!(__heap_end) as usize;
 
-    allocate_memory(start, size, PhysSource::Any, NORMAL_MEM | UXN | WRITABLE).unwrap();
     let heap = core::ptr::addr_of_mut!(GLOBAL_ALLOCATOR);
-    (*heap).init(start, start + size);
+    (*heap).init(start, end);
 }
 
 #[panic_handler]
@@ -53,6 +46,7 @@ pub mod configuration;
 pub mod framebuffer;
 pub mod interrupt_handlers;
 pub mod logger;
+pub mod timer;
 
 pub mod pi3;
 
@@ -79,7 +73,6 @@ pub fn get_current_el() -> u64 {
 }
 
 pub fn initialize_kernel() {
-    unsafe { init_kernel_heap() };
     logger::set_logger(Box::new(DefaultLogger));
     initialize_interrupt_handler();
 }

src/main.rs

@@ -9,12 +9,16 @@ use core::{
 
 extern crate alloc;
 
-use alloc::vec::Vec;
 use nova::{
-    aarch64::registers::{daif, read_id_aa64mmfr0_el1},
+    aarch64::{
+        mmu::{
+            allocate_memory_explicit, sim_l3_access, EL0_ACCESSIBLE, NORMAL_MEM, PXN, UXN, WRITABLE,
+        },
+        registers::{daif, read_id_aa64mmfr0_el1},
+    },
     configuration::mmu::initialize_mmu_translation_tables,
     framebuffer::{FrameBuffer, BLUE, GREEN, RED},
-    get_current_el,
+    get_current_el, init_heap,
     interrupt_handlers::{enable_irq_source, IRQSource},
     peripherals::{
         gpio::{
@@ -23,13 +27,11 @@ use nova::{
         },
         uart::uart_init,
     },
+    pi3::mailbox,
     println,
 };
 
 global_asm!(include_str!("vector.S"));
-global_asm!(include_str!("config.S"));
-
-static mut FRAMEBUFFER: Option<FrameBuffer> = None;
 
 extern "C" {
     fn el2_to_el1();
@@ -65,14 +67,23 @@ pub extern "C" fn main() -> ! {
     println!("Exception level: {}", get_current_el());
 
     unsafe {
+        init_heap();
+
         initialize_mmu_translation_tables();
+        // Frame Buffer memory range
+        // TODO: this is just temporary
+        allocate_memory_explicit(
+            0x3c100000,
+            1080 * 1920 * 4,
+            0x3c100000,
+            NORMAL_MEM | PXN | UXN | WRITABLE | EL0_ACCESSIBLE,
+        )
+        .unwrap();
+        sim_l3_access(0x3c100000);
         configure_mmu_el1();
-        println!("MMU initialized...");
     };
 
-    println!("Register: AA64MMFR0_EL1: {:064b}", read_id_aa64mmfr0_el1());
+    println!("AA64 {:064b}", read_id_aa64mmfr0_el1());
-    println!("Moving El2->EL1");
-    unsafe { FRAMEBUFFER = Some(FrameBuffer::default()) };
 
     unsafe {
         el2_to_el1();
@@ -92,17 +103,14 @@ unsafe fn zero_bss() {
 
 #[no_mangle]
 pub extern "C" fn kernel_main() -> ! {
-    println!("Kernel Start...");
     nova::initialize_kernel();
-    let mut test_vector = Vec::new();
-    for i in 0..20 {
-        test_vector.push(i);
-    }
-    println!("heap allocation test: {:?}", test_vector);
-
     println!("Exception Level: {}", get_current_el());
     daif::unmask_all();
+    let fb = FrameBuffer::default();
 
+    for i in 0..1080 {
+        fb.draw_pixel(50, i, RED);
+    }
     unsafe {
         el1_to_el0();
     };
@@ -123,25 +131,22 @@ pub extern "C" fn el0() -> ! {
 
     enable_irq_source(IRQSource::UartInt);
 
-    if let Some(fb) = unsafe { FRAMEBUFFER.as_mut() } {
+    let fb = FrameBuffer::default();
-        for i in 0..1080 {
-            fb.draw_pixel(50, i, BLUE);
-        }
-        fb.draw_square(500, 500, 600, 700, RED);
-        fb.draw_square_fill(800, 800, 900, 900, GREEN);
-        fb.draw_square_fill(1000, 800, 1200, 700, BLUE);
-        fb.draw_square_fill(900, 100, 800, 150, RED | BLUE);
-        fb.draw_string("Hello World! :D\nTest next Line", 500, 5, 3, BLUE);
 
-        fb.draw_function(cos, 0, 101, RED);
+    for i in 600..1080 {
+        fb.draw_pixel(50, i, RED);
     }
+    fb.draw_square(500, 500, 600, 700, RED);
+    fb.draw_square_fill(800, 800, 900, 900, GREEN);
+    fb.draw_square_fill(1000, 800, 1200, 700, BLUE);
+    fb.draw_square_fill(900, 100, 800, 150, RED | BLUE);
+    fb.draw_string("Hello World! :D\nTest next Line", 500, 5, 3, BLUE);
+
+    fb.draw_function(cos, 0, 101, RED);
 
     loop {
-        // TODO: Mailbox requires a physical address. The stack is now in VA space causing an issue.
+        let temp = mailbox::read_soc_temp([0]).unwrap();
-        // Fix with SVCs ?
+        println!("{} °C", temp[1] / 1000);
-
-        // let temp = mailbox::read_soc_temp([0]).unwrap();
-        // println!("{} °C", temp[1] / 1000);
 
         blink_gpio(SpecificGpio::OnboardLed as u8, 500);
     }

src/peripherals/gpio.rs

@@ -2,7 +2,7 @@ use core::result::Result;
 use core::result::Result::Ok;
 use core::sync::atomic::{compiler_fence, Ordering};
 
-use crate::pi3::timer::{delay_nops, sleep_ms};
+use crate::timer::{delay_nops, sleep_ms};
 use crate::{read_address, write_address};
 
 const GPFSEL_BASE: u32 = 0x3F20_0000;

src/pi3/mod.rs

@@ -1,3 +1,2 @@
 pub mod mailbox;
 pub mod power_management;
-pub mod timer;

src/vector.S

@@ -1,12 +1,13 @@
-.section .vector_table  , "ax"
+
+.global v_table
 .extern irq_handler
 
 .macro    ventry    label
-.align    11
+.align    7
 b    \label
 .endm
 
-.global vector_table
+.section .vector_table  , "ax"
 vector_table:
     ventry .
     ventry .
@@ -27,3 +28,190 @@ vector_table:
     ventry .
     ventry .
     ventry .
+
+
+.align 4
+.global el2_to_el1
+el2_to_el1:
+    mov x0, #(1 << 31)
+    msr HCR_EL2, x0
+
+    // Set SPSR_EL2: return to EL1h
+    mov x0, #(0b0101)
+    msr SPSR_EL2, x0
+
+    // Set return address to kernel_main
+    ldr x0, =kernel_main
+    msr ELR_EL2, x0
+
+    // Set SP_EL1 to stack base
+    ldr x0, =__stack_end
+    msr SP_EL1, x0
+
+    // Set VBAR_EL1 to vector table
+    adr x0, vector_table
+    msr VBAR_EL1, x0
+
+    isb
+
+    adrp x0, SCTLR_EL1_CONF
+    ldr  x1, [x0, :lo12:SCTLR_EL1_CONF]
+    msr SCTLR_EL1, x1
+
+    isb
+
+    // SIMD should not be trapped
+    mrs x0, CPACR_EL1
+    mov x1, #(0b11<<20)
+    orr x0,x0, x1
+    msr CPACR_EL1,x0
+
+    isb
+
+    // Return to EL1
+    eret
+
+.align 4
+.global configure_mmu_el1
+configure_mmu_el1:
+    // Configure MMU
+    adrp x0, TCR_EL1_CONF
+    ldr  x1, [x0, :lo12:TCR_EL1_CONF]
+    msr TCR_EL1, x1
+    isb
+
+    // MAIR0: Normal Mem.
+    // MAIR1: Device Mem.
+    mov x0, #0x04FF
+    msr MAIR_EL1, x0
+    isb
+
+    // Configure translation table
+    adrp x0, TRANSLATIONTABLE_TTBR0
+    add  x1, x0, :lo12:TRANSLATIONTABLE_TTBR0
+    msr TTBR0_EL1, x1
+    msr TTBR1_EL1, x1
+
+    tlbi vmalle1
+    dsb ish
+    isb
+
+    ret
+
+.align 4
+.global el1_to_el0
+el1_to_el0:
+
+    // Set SPSR_EL1: return to EL0t
+    mov x0, #(0b0000)
+    msr SPSR_EL1, x0
+
+    // Set return address to el0
+    ldr x0, =el0
+    msr ELR_EL1, x0
+
+    // Set SP_EL1 to stack base
+    ldr x0, =__stack_end_el0
+    msr SP_EL0, x0
+
+    isb
+
+    // Return to EL0
+    eret
+
+
+.align 4
+irq_handler:
+    sub sp, sp, #176
+    stp x0, x1, [sp, #0]
+    stp x2, x3, [sp, #16]
+    stp x4, x5, [sp, #32]
+    stp x6, x7, [sp, #48]
+    stp x8, x9, [sp, #64]
+    stp x10, x11, [sp, #80]
+    stp x12, x13, [sp, #96]
+    stp x14, x15, [sp, #112]
+    stp x16, x17, [sp, #128]
+    stp x18, x29, [sp, #144]
+    stp x30, xzr, [sp, #160]
+
+    bl rust_irq_handler
+
+    ldp x0, x1, [sp, #0]
+    ldp x2, x3, [sp, #16]
+    ldp x4, x5, [sp, #32]
+    ldp x6, x7, [sp, #48]
+    ldp x8, x9, [sp, #64]
+    ldp x10, x11, [sp, #80]
+    ldp x12, x13, [sp, #96]
+    ldp x14, x15, [sp, #112]
+    ldp x16, x17, [sp, #128]
+    ldp x18, x29, [sp, #144]
+    ldp x30, xzr, [sp, #160]
+    add sp, sp, #176
+
+    eret
+
+.align 4
+synchronous_interrupt_imm_lower_aarch64:
+    sub sp, sp, #176
+    stp x0, x1, [sp, #0]
+    stp x2, x3, [sp, #16]
+    stp x4, x5, [sp, #32]
+    stp x6, x7, [sp, #48]
+    stp x8, x9, [sp, #64]
+    stp x10, x11, [sp, #80]
+    stp x12, x13, [sp, #96]
+    stp x14, x15, [sp, #112]
+    stp x16, x17, [sp, #128]
+    stp x18, x29, [sp, #144]
+    stp x30, xzr, [sp, #160]
+
+    bl rust_synchronous_interrupt_imm_lower_aarch64
+
+    ldp x0, x1, [sp, #0]
+    ldp x2, x3, [sp, #16]
+    ldp x4, x5, [sp, #32]
+    ldp x6, x7, [sp, #48]
+    ldp x8, x9, [sp, #64]
+    ldp x10, x11, [sp, #80]
+    ldp x12, x13, [sp, #96]
+    ldp x14, x15, [sp, #112]
+    ldp x16, x17, [sp, #128]
+    ldp x18, x29, [sp, #144]
+    ldp x30, xzr, [sp, #160]
+    add sp, sp, #176
+
+    eret
+
+.align 4
+synchronous_interrupt_no_el_change:
+    sub sp, sp, #176
+    stp x0, x1, [sp, #0]
+    stp x2, x3, [sp, #16]
+    stp x4, x5, [sp, #32]
+    stp x6, x7, [sp, #48]
+    stp x8, x9, [sp, #64]
+    stp x10, x11, [sp, #80]
+    stp x12, x13, [sp, #96]
+    stp x14, x15, [sp, #112]
+    stp x16, x17, [sp, #128]
+    stp x18, x29, [sp, #144]
+    stp x30, xzr, [sp, #160]
+
+    bl rust_synchronous_interrupt_no_el_change
+
+    ldp x0, x1, [sp, #0]
+    ldp x2, x3, [sp, #16]
+    ldp x4, x5, [sp, #32]
+    ldp x6, x7, [sp, #48]
+    ldp x8, x9, [sp, #64]
+    ldp x10, x11, [sp, #80]
+    ldp x12, x13, [sp, #96]
+    ldp x14, x15, [sp, #112]
+    ldp x16, x17, [sp, #128]
+    ldp x18, x29, [sp, #144]
+    ldp x30, xzr, [sp, #160]
+    add sp, sp, #176
+
+    eret

tools/start_simulator_debug.sh

@@ -11,4 +11,6 @@ qemu-system-aarch64 \
   -cpu cortex-a53 \
   -serial stdio \
   -sd ../sd.img \
+  -display none \
   -kernel ../target/aarch64-unknown-none/debug/kernel8.img \
+  -s -S