add test step github ci

.gitignore

@@ -4,4 +4,3 @@ kernel8.img
 sd.img
 settings.json
 .DS_Store
-.venv

.vscode/launch.json

@@ -33,31 +33,6 @@
       ],
       "preLaunchTask": "Run QEMU"
     },
-    {
-      "name": "Attach to QEMU (AArch64) wo. window",
-      "type": "cppdbg",
-      "request": "launch",
-      "program": "${workspaceFolder}/target/aarch64-unknown-none/debug/nova",
-      "miDebuggerServerAddress": "localhost:1234",
-      "miDebuggerPath": "gdb",
-      "cwd": "${workspaceFolder}",
-      "stopAtEntry": true,
-      "externalConsole": false,
-      "MIMode": "gdb",
-      "setupCommands": [
-        {
-          "description": "Enable pretty-printing for gdb",
-          "text": "-enable-pretty-printing",
-          "ignoreFailures": true
-        },
-        {
-          "description": "Show assembly on stop",
-          "text": "set disassemble-next-line on",
-          "ignoreFailures": true
-        }
-      ],
-      "preLaunchTask": "Run QEMU wo window"
-    },
 
     {
       "name": "Attach LLDB",

.vscode/tasks.json

@@ -14,38 +14,9 @@
     {
       "label": "Run QEMU",
       "type": "shell",
-      "command": "llvm-objcopy -O binary target/aarch64-unknown-none/debug/nova target/aarch64-unknown-none/debug/kernel8.img && echo Starting QEMU&qemu-system-aarch64 -M raspi3b -cpu cortex-a53 -serial stdio -sd sd.img -kernel ${workspaceFolder}/target/aarch64-unknown-none/debug/kernel8.img -S -s -m 1024",
+      "command": "llvm-objcopy -O binary target/aarch64-unknown-none/debug/nova target/aarch64-unknown-none/debug/kernel8.img && qemu-system-aarch64 -M raspi3b -cpu cortex-a53 -serial stdio -sd sd.img -kernel ${workspaceFolder}/target/aarch64-unknown-none/debug/kernel8.img -S -s -m 1024",
       "isBackground": true,
-      "dependsOn": ["Build"],
-      "problemMatcher": {
-                "pattern": {
-                    "regexp": "^(Starting QEMU)",
-                    "line": 1,
-                },
-                "background": {
-                    "activeOnStart": true,
-                    "beginsPattern": "^(Starting QEMU)",
-                    "endsPattern": "^(Starting QEMU)"
-                }
-            }
-    },
-        {
-      "label": "Run QEMU wo window",
-      "type": "shell",
-      "command": "llvm-objcopy -O binary target/aarch64-unknown-none/debug/nova target/aarch64-unknown-none/debug/kernel8.img && echo Starting QEMU&qemu-system-aarch64 -M raspi3b -cpu cortex-a53 -display none -serial stdio -sd sd.img -kernel ${workspaceFolder}/target/aarch64-unknown-none/debug/kernel8.img -S -s -m 1024",
-      "isBackground": true,
-      "dependsOn": ["Build"],
-      "problemMatcher": {
-                "pattern": {
-                    "regexp": "^(Starting QEMU)",
-                    "line": 1,
-                },
-                "background": {
-                    "activeOnStart": true,
-                    "beginsPattern": "^(Starting QEMU)",
-                    "endsPattern": "^(Starting QEMU)"
-                }
-            }
+      "dependsOn": ["Build"]
     }
   ]
 }

Cargo.lock

@@ -47,19 +47,12 @@ dependencies = [
  "heap",
  "libm",
  "nova_error",
- "paste",
 ]
 
 [[package]]
 name = "nova_error"
 version = "0.1.0"
 
-[[package]]
-name = "paste"
-version = "1.0.15"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "57c0d7b74b563b49d38dae00a0c37d4d6de9b432382b2892f0574ddcae73fd0a"
-
 [[package]]
 name = "ppv-lite86"
 version = "0.2.21"

Cargo.toml

@@ -14,13 +14,11 @@ panic = "abort"
 
 [dependencies]
 libm = "0.2.15"
-heap = {path = "workspace/heap"}
-nova_error = {path = "workspace/nova_error"}
-paste = "1.0.15"
+heap = {path = "heap"}
+nova_error = {path = "nova_error"}
 
 [workspace]
 
-members = [
-    "workspace/nova_error",
-    "workspace/heap",
+members = [ "nova_error",
+    "heap"
 ]

README.md

@@ -14,10 +14,8 @@ NovaOS is a expository project where I build a kernel from scratch for a Raspber
 - Communicate with peripherals via mailboxes ✓
 - Frame Buffer ✓
 - Heap Memory allocation ✓
-- MMU ✓
-- SVC instructions
-- Kernel Independent Applications
 - Multi Core
 - Dynamic clock speed
+- MMU
 - Multiprocessing
 - Basic Terminal over UART

heap/src/lib.rs

@@ -15,7 +15,7 @@ extern crate alloc;
 
 #[repr(C, align(16))]
 #[derive(Clone, Copy)]
-struct HeapHeader {
+pub struct HeapHeader {
     next: Option<*mut HeapHeader>,
     before: Option<*mut HeapHeader>,
     size: usize,
@@ -26,9 +26,9 @@ const HEAP_HEADER_SIZE: usize = size_of::<HeapHeader>();
 const MIN_BLOCK_SIZE: usize = 16;
 
 pub struct Heap {
-    start_address: *mut HeapHeader,
-    end_address: *mut HeapHeader,
-    raw_size: usize,
+    pub start_address: *mut HeapHeader,
+    pub end_address: *mut HeapHeader,
+    pub raw_size: usize,
 }
 impl Heap {
     pub const fn empty() -> Self {
@@ -72,7 +72,7 @@ impl Heap {
         Ok(current)
     }
 
-    fn malloc(&self, mut size: usize) -> Result<*mut u8, NovaError> {
+    pub fn malloc(&self, mut size: usize) -> Result<*mut u8, NovaError> {
         if size == 0 {
             return Err(NovaError::EmptyHeapSegmentNotAllowed);
         }
@@ -130,7 +130,7 @@ impl Heap {
         }
     }
 
-    fn free(&self, pointer: *mut u8) -> Result<(), NovaError> {
+    pub fn free(&self, pointer: *mut u8) -> Result<(), NovaError> {
         let mut segment = Self::get_header_ref_from_data_pointer(pointer);
         unsafe {
             // IF prev is free:

heap/src/tests.rs

@@ -100,7 +100,7 @@ fn test_merging_free_sections() {
     );
 
     let root_header = heap.start_address;
-    let _root_header_start_size = unsafe { (*root_header).size };
+    let root_header_start_size = unsafe { (*root_header).size };
 
     let malloc1 = heap.malloc(MIN_BLOCK_SIZE).unwrap();
     let malloc_header_before = unsafe { *Heap::get_header_ref_from_data_pointer(malloc1) };
@@ -135,13 +135,14 @@ fn test_first_fit() {
     );
 
     let root_header = heap.start_address;
-    let _root_header_start_size = unsafe { (*root_header).size };
+    let root_header_start_size = unsafe { (*root_header).size };
 
     let malloc1 = heap.malloc(MIN_BLOCK_SIZE).unwrap();
-    let _malloc2 = heap.malloc(MIN_BLOCK_SIZE).unwrap();
+    let malloc2 = heap.malloc(MIN_BLOCK_SIZE).unwrap();
     let malloc3 = heap.malloc(MIN_BLOCK_SIZE * 3).unwrap();
     let malloc4 = heap.malloc(MIN_BLOCK_SIZE).unwrap();
 
+    unsafe {
         assert!(heap.free(malloc1).is_ok());
         assert!(heap.free(malloc3).is_ok());
         let malloc5 = heap.malloc(MIN_BLOCK_SIZE * 2).unwrap();
@@ -161,3 +162,4 @@ fn test_first_fit() {
         let malloc7 = heap.malloc(MIN_BLOCK_SIZE).unwrap();
         assert_eq!(malloc1, malloc7);
     }
+}

link.ld

@@ -4,8 +4,6 @@ SECTIONS {
     .text ALIGN(4) : {
         KEEP(*(.text._start))
         *(.text .text.*)
-        . = ALIGN(4K);
-        __text_end = .;
     }
 
     .rodata : {
@@ -13,34 +11,38 @@ SECTIONS {
     }
 
     .data : {
+        _data = .;
         *(.data .data.*)
     }
 
-    .bss ALIGN(16) (NOLOAD) : {
+    .bss (NOLOAD) : {
+        . = ALIGN(16);
         __bss_start = .;
         *(.bss .bss.*)
+        *(COMMON)
         __bss_end = .;
     }
 
-    . = ALIGN(2M);
-
-    __share_end = .;
-
-    .vector_table ALIGN(2K) : {
+    .vector_table ALIGN(2048) : {
         KEEP(*(.vector_table))
     }
 
-    # EL2 Stack
-    .stack ALIGN(16): {
+    .heap 0x8000000 : ALIGN(16)
+    {
+    __heap_start = .;
+    . += 0x10000; #10kB
+    __heap_end = .;
+    }
+
+    .stack : ALIGN(16)
+    {
     __stack_start = .;
-    . += 100K; #100kB stack
-    . = ALIGN(16);
+    . += 0x10000; #10kB stack
     __stack_end = .;
     }
 
-    . = ALIGN(2M);
 
-    __kernel_end = .;
+    _end = .;
 }
 
 __bss_size = (__bss_end - __bss_start) >> 3;

nova_error/src/lib.rs

@@ -8,7 +8,4 @@ pub enum NovaError {
     Mailbox,
     HeapFull,
     EmptyHeapSegmentNotAllowed,
-    Misalignment,
-    InvalidGranularity,
-    Paging,
 }

src/aarch64/mmu.rs

@@ -1,366 +0,0 @@
-use core::mem::size_of;
-use nova_error::NovaError;
-
-use crate::{
-    aarch64::mmu::physical_mapping::{
-        reserve_block, reserve_block_explicit, reserve_page, reserve_page_explicit,
-    },
-    get_current_el,
-};
-
-const BLOCK: u64 = 0b01;
-const TABLE: u64 = 0b11;
-const PAGE: u64 = 0b11;
-
-/// Allow EL0 to access this section
-pub const EL0_ACCESSIBLE: u64 = 1 << 6;
-
-/// Allow a page or block to be written.
-pub const WRITABLE: u64 = 0 << 7;
-/// Disallow a page or block to be written.
-pub const READ_ONLY: u64 = 1 << 7;
-
-const ACCESS_FLAG: u64 = 1 << 10;
-const INNER_SHAREABILITY: u64 = 0b11 << 8;
-
-pub const NORMAL_MEM: u64 = 0 << 2;
-pub const DEVICE_MEM: u64 = 1 << 2;
-
-/// Disallow EL1 Execution.
-pub const PXN: u64 = 1 << 53;
-
-/// Disallow EL0 Execution.
-pub const UXN: u64 = 1 << 54;
-
-pub const GRANULARITY: usize = 4 * 1024;
-const TABLE_ENTRY_COUNT: usize = GRANULARITY / size_of::<u64>(); // 2MiB
-
-pub const LEVEL1_BLOCK_SIZE: usize = TABLE_ENTRY_COUNT * TABLE_ENTRY_COUNT * GRANULARITY;
-pub const LEVEL2_BLOCK_SIZE: usize = TABLE_ENTRY_COUNT * GRANULARITY;
-
-const L2_BLOCK_BITMAP_WORDS: usize = LEVEL2_BLOCK_SIZE / (64 * GRANULARITY);
-
-const MAX_PAGE_COUNT: usize = 1024 * 1024 * 1024 / GRANULARITY;
-
-const TRANSLATION_TABLE_BASE_ADDR: usize = 0xFFFF_FF82_0000_0000;
-pub const KERNEL_VIRTUAL_MEM_SPACE: usize = 0xFFFF_FF80_0000_0000;
-
-pub const STACK_START_ADDR: usize = !KERNEL_VIRTUAL_MEM_SPACE & (!0xF);
-
-mod physical_mapping;
-
-type VirtAddr = usize;
-type PhysAddr = usize;
-
-pub enum PhysSource {
-    Any,
-    Explicit(PhysAddr),
-}
-
-#[repr(align(4096))]
-pub struct PageTable([u64; TABLE_ENTRY_COUNT]);
-
-#[no_mangle]
-pub static mut TRANSLATIONTABLE_TTBR0: PageTable = PageTable([0; 512]);
-#[no_mangle]
-pub static mut TRANSLATIONTABLE_TTBR1: PageTable = PageTable([0; 512]);
-
-/// Allocate a memory block of `size` starting at `virtual_address`.
-pub fn allocate_memory(
-    virtual_address: usize,
-    size_bytes: usize,
-    phys: PhysSource,
-    flags: u64,
-) -> Result<(), NovaError> {
-    if !virtual_address.is_multiple_of(GRANULARITY) {
-        return Err(NovaError::Misalignment);
-    }
-    if !size_bytes.is_multiple_of(GRANULARITY) {
-        return Err(NovaError::InvalidGranularity);
-    }
-
-    let base_table = if virtual_address & KERNEL_VIRTUAL_MEM_SPACE > 0 {
-        core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR1)
-    } else {
-        core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0)
-    };
-
-    match phys {
-        PhysSource::Any => map_range_dynamic(virtual_address, size_bytes, base_table, flags),
-        PhysSource::Explicit(phys_addr) => {
-            map_range_explicit(virtual_address, phys_addr, size_bytes, base_table, flags)
-        }
-    }
-}
-
-fn map_range_explicit(
-    mut virt: VirtAddr,
-    mut phys: PhysAddr,
-    size_bytes: usize,
-    base: *mut PageTable,
-    flags: u64,
-) -> Result<(), NovaError> {
-    let mut remaining = size_bytes;
-
-    while virt % LEVEL2_BLOCK_SIZE != 0 {
-        map_page(virt, phys, base, flags)?;
-        (virt, _) = virt.overflowing_add(GRANULARITY);
-        phys += GRANULARITY;
-        remaining -= GRANULARITY;
-    }
-
-    while remaining >= LEVEL2_BLOCK_SIZE {
-        map_l2_block(virt, phys, base, flags)?;
-        (virt, _) = virt.overflowing_add(LEVEL2_BLOCK_SIZE);
-        phys += LEVEL2_BLOCK_SIZE;
-        remaining -= LEVEL2_BLOCK_SIZE;
-    }
-
-    while remaining > 0 {
-        map_page(virt, phys, base, flags)?;
-        (virt, _) = virt.overflowing_add(GRANULARITY);
-        phys += GRANULARITY;
-        remaining -= GRANULARITY;
-    }
-
-    Ok(())
-}
-
-fn map_range_dynamic(
-    mut virt: PhysAddr,
-    size_bytes: usize,
-    base: *mut PageTable,
-    flags: u64,
-) -> Result<(), NovaError> {
-    let mut remaining = size_bytes;
-
-    while remaining >= LEVEL2_BLOCK_SIZE {
-        map_l2_block(virt, reserve_block(), base, flags)?;
-        (virt, _) = virt.overflowing_add(LEVEL2_BLOCK_SIZE);
-        remaining -= LEVEL2_BLOCK_SIZE;
-    }
-
-    while remaining > 0 {
-        map_page(virt, reserve_page(), base, flags)?;
-        (virt, _) = virt.overflowing_add(GRANULARITY);
-        remaining -= GRANULARITY;
-    }
-
-    Ok(())
-}
-
-/// Allocate a singe page.
-pub fn alloc_page(
-    virtual_address: usize,
-    base_table: *mut PageTable,
-    additional_flags: u64,
-) -> Result<(), NovaError> {
-    map_page(
-        virtual_address,
-        reserve_page(),
-        base_table,
-        additional_flags,
-    )
-}
-
-/// Allocate a single page at an explicit `physical_address`.
-pub fn alloc_page_explicit(
-    virtual_address: usize,
-    physical_address: usize,
-    base_table: *mut PageTable,
-    additional_flags: u64,
-) -> Result<(), NovaError> {
-    reserve_page_explicit(physical_address)?;
-    map_page(
-        virtual_address,
-        physical_address,
-        base_table,
-        additional_flags,
-    )
-}
-
-pub fn map_page(
-    virtual_address: usize,
-    physical_address: usize,
-    base_table_ptr: *mut PageTable,
-    additional_flags: u64,
-) -> Result<(), NovaError> {
-    let (l1_off, l2_off, l3_off) = virtual_address_to_table_offset(virtual_address);
-
-    let offsets = [l1_off, l2_off];
-
-    let table_ptr = navigate_table(base_table_ptr, &offsets)?;
-    let table = unsafe { &mut *table_ptr };
-
-    if table.0[l3_off] & 0b11 > 0 {
-        return Err(NovaError::Paging);
-    }
-
-    table.0[l3_off] = create_page_descriptor_entry(physical_address, additional_flags);
-
-    Ok(())
-}
-
-// Allocate a level 2 block, at a explicit `physical_address`.
-pub fn alloc_block_l2_explicit(
-    virtual_addr: usize,
-    physical_address: usize,
-    base_table_ptr: *mut PageTable,
-    additional_flags: u64,
-) -> Result<(), NovaError> {
-    if !physical_address.is_multiple_of(LEVEL2_BLOCK_SIZE) {
-        return Err(NovaError::Misalignment);
-    }
-
-    reserve_block_explicit(physical_address)?;
-    map_l2_block(
-        virtual_addr,
-        physical_address,
-        base_table_ptr,
-        additional_flags,
-    )
-}
-
-pub fn map_l2_block(
-    virtual_addr: usize,
-    physical_address: usize,
-    base_table_ptr: *mut PageTable,
-    additional_flags: u64,
-) -> Result<(), NovaError> {
-    let (l1_off, l2_off, _) = virtual_address_to_table_offset(virtual_addr);
-    let offsets = [l1_off];
-    let table_ptr = navigate_table(base_table_ptr, &offsets)?;
-
-    let table = unsafe { &mut *table_ptr };
-
-    // Verify virtual address is available.
-    if table.0[l2_off] & 0b11 != 0 {
-        return Err(NovaError::Paging);
-    }
-
-    let new_entry = create_block_descriptor_entry(physical_address, additional_flags);
-
-    table.0[l2_off] = new_entry;
-
-    Ok(())
-}
-
-pub fn reserve_range(
-    start_physical_address: PhysAddr,
-    end_physical_address: PhysAddr,
-) -> Result<PhysAddr, NovaError> {
-    let mut size = end_physical_address - start_physical_address;
-    let l1_blocks = size / LEVEL1_BLOCK_SIZE;
-    size %= LEVEL1_BLOCK_SIZE;
-    let l2_blocks = size / LEVEL2_BLOCK_SIZE;
-    size %= LEVEL2_BLOCK_SIZE;
-    let l3_pages = size / GRANULARITY;
-
-    if !size.is_multiple_of(GRANULARITY) {
-        return Err(NovaError::Misalignment);
-    }
-
-    if l1_blocks > 0 {
-        todo!();
-    }
-
-    let mut addr = start_physical_address;
-    for _ in 0..l2_blocks {
-        reserve_block_explicit(addr)?;
-        addr += LEVEL2_BLOCK_SIZE;
-    }
-
-    for _ in 0..l3_pages {
-        reserve_page_explicit(addr)?;
-        addr += GRANULARITY;
-    }
-
-    Ok(start_physical_address)
-}
-
-fn create_block_descriptor_entry(physical_address: usize, additional_flags: u64) -> u64 {
-    (physical_address as u64 & 0x0000_FFFF_FFFF_F000)
-        | BLOCK
-        | ACCESS_FLAG
-        | INNER_SHAREABILITY
-        | additional_flags
-}
-
-fn create_page_descriptor_entry(physical_address: usize, additional_flags: u64) -> u64 {
-    (physical_address as u64 & 0x0000_FFFF_FFFF_F000)
-        | PAGE
-        | ACCESS_FLAG
-        | INNER_SHAREABILITY
-        | additional_flags
-}
-
-fn create_table_descriptor_entry(addr: usize) -> u64 {
-    (addr as u64 & 0x0000_FFFF_FFFF_F000) | TABLE
-}
-
-fn virtual_address_to_table_offset(virtual_addr: usize) -> (usize, usize, usize) {
-    let absolute_page_off = (virtual_addr & !KERNEL_VIRTUAL_MEM_SPACE) / GRANULARITY;
-    let l3_off = absolute_page_off % TABLE_ENTRY_COUNT;
-    let l2_off = (absolute_page_off / TABLE_ENTRY_COUNT) % TABLE_ENTRY_COUNT;
-    let l1_off = (absolute_page_off / TABLE_ENTRY_COUNT / TABLE_ENTRY_COUNT) % TABLE_ENTRY_COUNT;
-    (l1_off, l2_off, l3_off)
-}
-
-/// Navigate the table tree, by following given offsets. This function
-/// allocates new tables if required.
-fn navigate_table(
-    initial_table_ptr: *mut PageTable,
-    offsets: &[usize],
-) -> Result<*mut PageTable, NovaError> {
-    let mut table = initial_table_ptr;
-    for offset in offsets {
-        table = next_table(table, *offset)?;
-    }
-    Ok(table)
-}
-
-/// Get the next table one level down.
-///
-/// If table doesn't exit a page will be allocated for it.
-fn next_table(table_ptr: *mut PageTable, offset: usize) -> Result<*mut PageTable, NovaError> {
-    let table = unsafe { &mut *table_ptr };
-    match table.0[offset] & 0b11 {
-        0 => {
-            let new_phys_page_table_address = reserve_page();
-
-            table.0[offset] = create_table_descriptor_entry(new_phys_page_table_address);
-            map_page(
-                phys_table_to_kernel_space(new_phys_page_table_address),
-                new_phys_page_table_address,
-                &raw mut TRANSLATIONTABLE_TTBR1,
-                NORMAL_MEM | WRITABLE | PXN | UXN,
-            )?;
-
-            Ok(entry_table_addr(table.0[offset] as usize) as *mut PageTable)
-        }
-        1 => Err(NovaError::Paging),
-        3 => Ok(entry_table_addr(table.0[offset] as usize) as *mut PageTable),
-        _ => unreachable!(),
-    }
-}
-
-/// Extracts the physical address out of an table entry.
-#[inline]
-fn entry_phys(entry: usize) -> PhysAddr {
-    entry & 0x0000_FFFF_FFFF_F000
-}
-
-#[inline]
-fn entry_table_addr(entry: usize) -> VirtAddr {
-    if get_current_el() == 1 {
-        phys_table_to_kernel_space(entry_phys(entry))
-    } else {
-        entry_phys(entry)
-    }
-}
-
-/// Extracts the physical address out of an table entry.
-#[inline]
-fn phys_table_to_kernel_space(entry: usize) -> VirtAddr {
-    entry | TRANSLATION_TABLE_BASE_ADDR
-}

src/aarch64/mmu/physical_mapping.rs

@@ -1,89 +0,0 @@
-use crate::aarch64::mmu::{PhysAddr, GRANULARITY, L2_BLOCK_BITMAP_WORDS, MAX_PAGE_COUNT};
-use nova_error::NovaError;
-
-static mut PAGING_BITMAP: [u64; MAX_PAGE_COUNT / 64] = [0; MAX_PAGE_COUNT / 64];
-
-pub fn reserve_page() -> PhysAddr {
-    if let Some(address) = find_unallocated_page() {
-        let page = address / GRANULARITY;
-        let word_index = page / 64;
-        unsafe { PAGING_BITMAP[word_index] |= 1 << (page % 64) };
-        return address;
-    }
-    panic!("Out of Memory!");
-}
-
-pub fn reserve_page_explicit(physical_address: usize) -> Result<PhysAddr, NovaError> {
-    let page = physical_address / GRANULARITY;
-    let word_index = page / 64;
-
-    if unsafe { PAGING_BITMAP[word_index] } & (1 << (page % 64)) > 0 {
-        return Err(NovaError::Paging);
-    }
-
-    unsafe { PAGING_BITMAP[word_index] |= 1 << (page % 64) };
-    Ok(physical_address)
-}
-
-pub fn reserve_block() -> usize {
-    if let Some(start) = find_contiguous_free_bitmap_words(L2_BLOCK_BITMAP_WORDS) {
-        for j in 0..L2_BLOCK_BITMAP_WORDS {
-            unsafe { PAGING_BITMAP[start + j] = u64::MAX };
-        }
-        return start * 64 * GRANULARITY;
-    }
-
-    panic!("Out of Memory!");
-}
-
-pub fn reserve_block_explicit(physical_address: usize) -> Result<(), NovaError> {
-    let page = physical_address / GRANULARITY;
-    for i in 0..L2_BLOCK_BITMAP_WORDS {
-        unsafe {
-            if PAGING_BITMAP[(page / 64) + i] != 0 {
-                return Err(NovaError::Paging);
-            }
-        };
-    }
-    for i in 0..L2_BLOCK_BITMAP_WORDS {
-        unsafe {
-            PAGING_BITMAP[(page / 64) + i] = u64::MAX;
-        };
-    }
-    Ok(())
-}
-
-fn find_unallocated_page() -> Option<usize> {
-    for (i, entry) in unsafe { PAGING_BITMAP }.iter().enumerate() {
-        if *entry != u64::MAX {
-            for offset in 0..64 {
-                if entry >> offset & 0b1 == 0 {
-                    return Some((i * 64 + offset) * GRANULARITY);
-                }
-            }
-        }
-    }
-    None
-}
-
-fn find_contiguous_free_bitmap_words(required_words: usize) -> Option<usize> {
-    let mut run_start = 0;
-    let mut run_len = 0;
-
-    for (i, entry) in unsafe { PAGING_BITMAP }.iter().enumerate() {
-        if *entry == 0 {
-            if run_len == 0 {
-                run_start = i;
-            }
-            run_len += 1;
-
-            if run_len == required_words {
-                return Some(run_start);
-            }
-        } else {
-            run_len = 0;
-        }
-    }
-
-    None
-}

src/aarch64/mod.rs

@@ -1,2 +0,0 @@
-pub mod mmu;
-pub mod registers;

src/aarch64/registers.rs

@@ -1,59 +0,0 @@
-use core::arch::asm;
-
-pub mod daif {
-    use core::arch::asm;
-
-    #[inline(always)]
-    pub fn mask_all() {
-        unsafe { asm!("msr DAIFSet, #0xf", options(nomem, nostack)) }
-    }
-
-    #[inline(always)]
-    pub fn unmask_all() {
-        unsafe { asm!("msr DAIFClr, #0xf", options(nomem, nostack)) }
-    }
-
-    #[inline(always)]
-    pub fn mask_irq() {
-        unsafe { asm!("msr DAIFSet, #0x2", options(nomem, nostack)) }
-    }
-
-    #[inline(always)]
-    pub fn unmask_irq() {
-        unsafe { asm!("msr DAIFClr, #0x2", options(nomem, nostack)) }
-    }
-}
-
-#[macro_export]
-macro_rules! psr {
-    ($name:ident, $t:tt) => {
-        paste::item! {
-            pub fn [<read_ $name:lower>]() -> $t {
-                let buf: $t;
-                unsafe {
-                    asm!(
-                        concat!("mrs {0:x}, ", stringify!($name)),
-                        out(reg) buf
-                    );
-                }
-                buf
-            }
-        }
-    };
-}
-
-psr!(TCR_EL1, u64);
-
-psr!(ID_AA64MMFR0_EL1, u64);
-
-psr!(ESR_EL1, u32);
-
-psr!(SPSR_EL1, u32);
-
-psr!(ELR_EL1, u64);
-
-psr!(SCTLR_EL1, u64);
-
-pub fn read_exception_source_el() -> u32 {
-    read_spsr_el1() & 0b1111
-}

src/config.S

@@ -1,194 +0,0 @@
-.section .text.config
-.align 4
-.global el2_to_el1
-el2_to_el1:
-    mov x0, #(1 << 31)
-    msr HCR_EL2, x0
-
-    // Set SPSR_EL2: return to EL1h
-    mov x0, #(0b0101)
-    msr SPSR_EL2, x0
-
-    // Set return address to kernel_main
-    adrp x0, kernel_main
-    add  x0, x0, :lo12:kernel_main
-    msr ELR_EL2, x0
-
-    // Set SP_EL1 to stack base
-    adrp x0, EL1_STACK_TOP
-    ldr  x1, [x0, :lo12:EL1_STACK_TOP]
-    msr SP_EL1, x1
-
-    // Set VBAR_EL1 to vector table
-    adrp x0, vector_table
-    add  x0, x0, :lo12:vector_table
-    msr VBAR_EL1, x0
-
-    isb
-
-    adrp x0, SCTLR_EL1_CONF
-    ldr  x1, [x0, :lo12:SCTLR_EL1_CONF]
-    msr SCTLR_EL1, x1
-
-    isb
-
-    // SIMD should not be trapped
-    mrs x0, CPACR_EL1
-    mov x1, #(0b11<<20)
-    orr x0,x0, x1
-    msr CPACR_EL1,x0
-
-    isb
-
-    // Return to EL1
-    eret
-
-.section .text.config
-.align 4
-.global configure_mmu_el1
-configure_mmu_el1:
-    // Configure MMU
-    adrp x0, TCR_EL1_CONF
-    ldr  x1, [x0, :lo12:TCR_EL1_CONF]
-    msr TCR_EL1, x1
-    isb
-
-    // MAIR0: Normal Mem.
-    // MAIR1: Device Mem.
-    mov x0, #0x04FF
-    msr MAIR_EL1, x0
-    isb
-
-    // Configure translation table
-    adrp x0, TRANSLATIONTABLE_TTBR0
-    add  x1, x0, :lo12:TRANSLATIONTABLE_TTBR0
-    msr TTBR0_EL1, x1
-
-    adrp x0, TRANSLATIONTABLE_TTBR1
-    add  x1, x0, :lo12:TRANSLATIONTABLE_TTBR1
-    msr TTBR1_EL1, x1
-
-    tlbi vmalle1
-    dsb ish
-    isb
-
-    ret
-
-.align 4
-.global el1_to_el0
-el1_to_el0:
-
-    // Set SPSR_EL1: return to EL0t
-    mov x0, #(0b0000)
-    msr SPSR_EL1, x0
-
-    // Set return address to el0
-    ldr x0, =el0
-    msr ELR_EL1, x0
-
-    // Set SP_EL1 to stack base
-    adrp x0, EL0_STACK_TOP
-    ldr  x1, [x0, :lo12:EL0_STACK_TOP]
-    msr SP_EL0, x1
-
-    isb
-
-    // Return to EL0
-    eret
-
-
-.align 4
-irq_handler:
-    sub sp, sp, #176
-    stp x0, x1, [sp, #0]
-    stp x2, x3, [sp, #16]
-    stp x4, x5, [sp, #32]
-    stp x6, x7, [sp, #48]
-    stp x8, x9, [sp, #64]
-    stp x10, x11, [sp, #80]
-    stp x12, x13, [sp, #96]
-    stp x14, x15, [sp, #112]
-    stp x16, x17, [sp, #128]
-    stp x18, x29, [sp, #144]
-    stp x30, xzr, [sp, #160]
-
-    bl rust_irq_handler
-
-    ldp x0, x1, [sp, #0]
-    ldp x2, x3, [sp, #16]
-    ldp x4, x5, [sp, #32]
-    ldp x6, x7, [sp, #48]
-    ldp x8, x9, [sp, #64]
-    ldp x10, x11, [sp, #80]
-    ldp x12, x13, [sp, #96]
-    ldp x14, x15, [sp, #112]
-    ldp x16, x17, [sp, #128]
-    ldp x18, x29, [sp, #144]
-    ldp x30, xzr, [sp, #160]
-    add sp, sp, #176
-
-    eret
-
-.align 4
-synchronous_interrupt_imm_lower_aarch64:
-    sub sp, sp, #176
-    stp x0, x1, [sp, #0]
-    stp x2, x3, [sp, #16]
-    stp x4, x5, [sp, #32]
-    stp x6, x7, [sp, #48]
-    stp x8, x9, [sp, #64]
-    stp x10, x11, [sp, #80]
-    stp x12, x13, [sp, #96]
-    stp x14, x15, [sp, #112]
-    stp x16, x17, [sp, #128]
-    stp x18, x29, [sp, #144]
-    stp x30, xzr, [sp, #160]
-
-    bl rust_synchronous_interrupt_imm_lower_aarch64
-
-    ldp x0, x1, [sp, #0]
-    ldp x2, x3, [sp, #16]
-    ldp x4, x5, [sp, #32]
-    ldp x6, x7, [sp, #48]
-    ldp x8, x9, [sp, #64]
-    ldp x10, x11, [sp, #80]
-    ldp x12, x13, [sp, #96]
-    ldp x14, x15, [sp, #112]
-    ldp x16, x17, [sp, #128]
-    ldp x18, x29, [sp, #144]
-    ldp x30, xzr, [sp, #160]
-    add sp, sp, #176
-
-    eret
-
-.align 4
-synchronous_interrupt_no_el_change:
-    sub sp, sp, #176
-    stp x0, x1, [sp, #0]
-    stp x2, x3, [sp, #16]
-    stp x4, x5, [sp, #32]
-    stp x6, x7, [sp, #48]
-    stp x8, x9, [sp, #64]
-    stp x10, x11, [sp, #80]
-    stp x12, x13, [sp, #96]
-    stp x14, x15, [sp, #112]
-    stp x16, x17, [sp, #128]
-    stp x18, x29, [sp, #144]
-    stp x30, xzr, [sp, #160]
-
-    bl rust_synchronous_interrupt_no_el_change
-
-    ldp x0, x1, [sp, #0]
-    ldp x2, x3, [sp, #16]
-    ldp x4, x5, [sp, #32]
-    ldp x6, x7, [sp, #48]
-    ldp x8, x9, [sp, #64]
-    ldp x10, x11, [sp, #80]
-    ldp x12, x13, [sp, #96]
-    ldp x14, x15, [sp, #112]
-    ldp x16, x17, [sp, #128]
-    ldp x18, x29, [sp, #144]
-    ldp x30, xzr, [sp, #160]
-    add sp, sp, #176
-
-    eret

src/configuration.rs

@@ -1,129 +1,16 @@
-const SCTLR_EL1_MMU_ENABLED: u64 = 1; //M
-const SCTLR_EL1_DATA_CACHE_DISABLED: u64 = 0 << 2; //C
-const SCTLR_EL1_INSTRUCTION_CACHE_DISABLED: u64 = 0 << 12; //I
-const SCTLR_EL1_LITTLE_ENDIAN_EL0: u64 = 0 << 24; //E0E
-const SCTLR_EL1_LITTLE_ENDIAN_EL1: u64 = 0 << 25; //EE
-const SCTLR_EL1_SPAN: u64 = 1 << 23; //SPAN
+static SCTLR_EL1_MMU_DISABLED: u64 = 0; //M
+static SCTLR_EL1_DATA_CACHE_DISABLED: u64 = 0 << 2; //C
+static SCTLR_EL1_INSTRUCTION_CACHE_DISABLED: u64 = 0 << 12; //I
+static SCTLR_EL1_LITTLE_ENDIAN_EL0: u64 = 0 << 24; //E0E
+static SCTLR_EL1_LITTLE_ENDIAN_EL1: u64 = 0 << 25; //EE
 
 #[allow(clippy::identity_op)]
-const SCTLR_EL1_RES: u64 = (0 << 6) | (1 << 11) | (0 << 17) | (1 << 20) | (1 << 22); //Res0 & Res1
+static SCTLR_EL1_RES: u64 = (0 << 6) | (1 << 11) | (0 << 17) | (1 << 20) | (1 << 22); //Res0 & Res1
 
 #[no_mangle]
-pub static SCTLR_EL1_CONF: u64 = SCTLR_EL1_MMU_ENABLED
+pub static SCTLR_EL1_CONF: u64 = SCTLR_EL1_MMU_DISABLED
     | SCTLR_EL1_DATA_CACHE_DISABLED
     | SCTLR_EL1_INSTRUCTION_CACHE_DISABLED
     | SCTLR_EL1_LITTLE_ENDIAN_EL0
     | SCTLR_EL1_LITTLE_ENDIAN_EL1
-    | SCTLR_EL1_RES
-    | SCTLR_EL1_SPAN;
-
-const TG0: u64 = 0b00 << 14; // 4KB granularity EL0
-const T0SZ: u64 = 25; // 25 Bits of TTBR select -> 39 Bits of VA
-const SH0: u64 = 0b11 << 12; // Inner shareable
-
-const TG1: u64 = 0b10 << 30; // 4KB granularity EL1
-const T1SZ: u64 = 25 << 16; // 25 Bits of TTBR select -> 39 Bits of VA
-const SH1: u64 = 0b11 << 28; // Inner sharable
-
-const IPS: u64 = 0b000 << 32; // 32 bits of PA space -> up to 4GiB
-const AS: u64 = 0b1 << 36; // configure an ASID size of 16 bits
-
-#[no_mangle]
-pub static TCR_EL1_CONF: u64 = IPS | TG0 | TG1 | T0SZ | T1SZ | SH0 | SH1 | AS;
-
-pub mod mmu {
-    use crate::{
-        aarch64::mmu::{
-            alloc_block_l2_explicit, allocate_memory, map_l2_block, map_page, reserve_range,
-            PhysSource, DEVICE_MEM, EL0_ACCESSIBLE, GRANULARITY, KERNEL_VIRTUAL_MEM_SPACE,
-            LEVEL1_BLOCK_SIZE, LEVEL2_BLOCK_SIZE, NORMAL_MEM, PXN, READ_ONLY, STACK_START_ADDR,
-            TRANSLATIONTABLE_TTBR0, UXN, WRITABLE,
-        },
-        PERIPHERAL_BASE,
-    };
-
-    #[no_mangle]
-    static EL1_STACK_TOP: usize = STACK_START_ADDR | KERNEL_VIRTUAL_MEM_SPACE;
-    const EL1_STACK_SIZE: usize = LEVEL2_BLOCK_SIZE * 2;
-    #[no_mangle]
-    static EL0_STACK_TOP: usize = STACK_START_ADDR;
-    const EL0_STACK_SIZE: usize = LEVEL2_BLOCK_SIZE * 2;
-    extern "C" {
-        static __text_end: u64;
-        static __share_end: u64;
-        static __kernel_end: u64;
-    }
-
-    pub fn initialize_mmu_translation_tables() {
-        let text_end = unsafe { &__text_end } as *const _ as usize;
-        let shared_segment_end = unsafe { &__share_end } as *const _ as usize;
-        let kernel_end = unsafe { &__kernel_end } as *const _ as usize;
-
-        reserve_range(0x0, kernel_end).unwrap();
-
-        for addr in (0..text_end).step_by(GRANULARITY) {
-            map_page(
-                addr,
-                addr,
-                core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
-                EL0_ACCESSIBLE | READ_ONLY | NORMAL_MEM,
-            )
-            .unwrap();
-        }
-
-        for addr in (text_end..shared_segment_end).step_by(GRANULARITY) {
-            map_page(
-                addr,
-                addr,
-                core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
-                EL0_ACCESSIBLE | WRITABLE | NORMAL_MEM,
-            )
-            .unwrap();
-        }
-
-        for addr in (shared_segment_end..kernel_end).step_by(LEVEL2_BLOCK_SIZE) {
-            map_l2_block(
-                addr,
-                addr,
-                core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
-                WRITABLE | UXN | NORMAL_MEM,
-            )
-            .unwrap();
-        }
-
-        for addr in (PERIPHERAL_BASE..LEVEL1_BLOCK_SIZE).step_by(LEVEL2_BLOCK_SIZE) {
-            alloc_block_l2_explicit(
-                addr,
-                addr,
-                core::ptr::addr_of_mut!(TRANSLATIONTABLE_TTBR0),
-                EL0_ACCESSIBLE | WRITABLE | UXN | PXN | DEVICE_MEM,
-            )
-            .unwrap();
-        }
-
-        // Frame Buffer memory range
-        allocate_memory(
-            0x3c100000,
-            1080 * 1920 * 4,
-            PhysSource::Explicit(0x3c100000),
-            NORMAL_MEM | PXN | UXN | WRITABLE | EL0_ACCESSIBLE,
-        )
-        .unwrap();
-
-        allocate_memory(
-            EL1_STACK_TOP - EL1_STACK_SIZE + 0x10,
-            EL1_STACK_SIZE,
-            PhysSource::Any,
-            WRITABLE | NORMAL_MEM,
-        )
-        .unwrap();
-
-        allocate_memory(
-            EL0_STACK_TOP - EL0_STACK_SIZE + 0x10,
-            EL0_STACK_SIZE,
-            PhysSource::Any,
-            WRITABLE | EL0_ACCESSIBLE | NORMAL_MEM,
-        )
-        .unwrap();
-    }
-}
+    | SCTLR_EL1_RES;

src/framebuffer.rs

@@ -4,10 +4,7 @@ mod bitmaps;
 
 use bitmaps::BASIC_LEGACY;
 
-use crate::{
-    pi3::mailbox::{read_mailbox, write_mailbox},
-    println,
-};
+use crate::mailbox::{read_mailbox, write_mailbox};
 #[repr(align(16))]
 struct Mailbox([u32; 36]);
 
@@ -24,8 +21,8 @@ pub struct FrameBuffer {
     pixel_depth: u32, // Bits per pixel
     pitch: u32,       // Pixel per row
     rows: u32,        // Rows
-    pub start_addr: *mut u32,
-    pub size: u32, //Bytes
+    start_addr: *mut u32,
+    size: u32, //Bytes
 }
 
 pub const RED: u32 = 0x00FF0000;
@@ -37,9 +34,6 @@ pub const YELLOW: u32 = 0x00FFFF00;
 impl FrameBuffer {
     pub fn draw_pixel(&self, x: u32, y: u32, color: u32) {
         let offset = x + y * self.pitch;
-        if x >= self.pitch || y >= self.rows {
-            return;
-        }
         unsafe {
             write_volatile(self.start_addr.add(offset as usize), color);
         }

src/interrupt_handlers.rs

@@ -1,228 +0,0 @@
-use core::arch::asm;
-
-use alloc::vec::Vec;
-
-use crate::{
-    aarch64::registers::{
-        daif::{mask_all, unmask_irq},
-        read_elr_el1, read_esr_el1, read_exception_source_el,
-    },
-    get_current_el,
-    peripherals::{
-        gpio::{read_gpio_event_detect_status, reset_gpio_event_detect_status},
-        uart::clear_uart_interrupt_state,
-    },
-    println, read_address, write_address,
-};
-
-const INTERRUPT_BASE: u32 = 0x3F00_B000;
-const IRQ_PENDING_BASE: u32 = INTERRUPT_BASE + 0x204;
-const ENABLE_IRQ_BASE: u32 = INTERRUPT_BASE + 0x210;
-const DISABLE_IRQ_BASE: u32 = INTERRUPT_BASE + 0x21C;
-
-const GPIO_PENDING_BIT_OFFSET: u64 = 0b1111 << 49;
-
-struct InterruptHandlers {
-    source: IRQSource,
-    function: fn(),
-}
-
-// TODO: replace with hashmap and check for better alternatives for option
-static mut INTERRUPT_HANDLERS: Option<Vec<InterruptHandlers>> = None;
-
-#[derive(Clone)]
-#[repr(u32)]
-pub enum IRQSource {
-    AuxInt = 29,
-    I2cSpiSlvInt = 44,
-    Pwa0 = 45,
-    Pwa1 = 46,
-    Smi = 48,
-    GpioInt0 = 49,
-    GpioInt1 = 50,
-    GpioInt2 = 51,
-    GpioInt3 = 52,
-    I2cInt = 53,
-    SpiInt = 54,
-    PcmInt = 55,
-    UartInt = 57,
-}
-
-/// Representation of the ESR_ELx registers
-///
-///  Reference: D1.10.4
-#[derive(Debug, Clone, Copy)]
-#[allow(dead_code)]
-struct EsrElX {
-    ec: u32,
-    il: u32,
-    iss: u32,
-}
-
-impl From<u32> for EsrElX {
-    fn from(value: u32) -> Self {
-        Self {
-            ec: value >> 26,
-            il: (value >> 25) & 0b1,
-            iss: value & 0x1FFFFFF,
-        }
-    }
-}
-
-#[no_mangle]
-unsafe extern "C" fn rust_irq_handler() {
-    mask_all();
-    let pending_irqs = get_irq_pending_sources();
-
-    if pending_irqs & GPIO_PENDING_BIT_OFFSET != 0 {
-        handle_gpio_interrupt();
-        let source_el = read_exception_source_el() >> 2;
-        println!("Source EL: {}", source_el);
-        println!("Current EL: {}", get_current_el());
-        println!("Return register address: {:#x}", read_esr_el1());
-    }
-
-    if let Some(handler_vec) = unsafe { &*core::ptr::addr_of_mut!(INTERRUPT_HANDLERS) } {
-        for handler in handler_vec {
-            if (pending_irqs & (1 << (handler.source.clone() as u32))) != 0 {
-                (handler.function)();
-                clear_interrupt_for_source(handler.source.clone());
-            }
-        }
-    }
-}
-
-#[no_mangle]
-unsafe extern "C" fn rust_synchronous_interrupt_no_el_change() {
-    mask_all();
-
-    let source_el = read_exception_source_el() >> 2;
-    println!("--------Sync Exception in EL{}--------", source_el);
-    println!("No EL change");
-    println!("Current EL: {}", get_current_el());
-    println!("{:?}", EsrElX::from(read_esr_el1()));
-    println!("Return register address: {:#x}", read_esr_el1());
-    println!("-------------------------------------");
-}
-
-/// Synchronous Exception Handler
-///
-/// Lower Exception level, where the implemented level
-/// immediately lower than the target level is using
-/// AArch64.
-#[no_mangle]
-unsafe extern "C" fn rust_synchronous_interrupt_imm_lower_aarch64() {
-    mask_all();
-
-    let source_el = read_exception_source_el() >> 2;
-    println!("--------Sync Exception in EL{}--------", source_el);
-    println!("Exception escalated to EL {}", get_current_el());
-    println!("Current EL: {}", get_current_el());
-    let esr: EsrElX = EsrElX::from(read_esr_el1());
-    println!("{:?}", esr);
-    println!("Return address: {:#x}", read_elr_el1());
-
-    match esr.ec {
-        0b100100 => {
-            println!("Cause: Data Abort from a lower Exception level");
-        }
-        _ => {
-            println!("Unknown Error Code: {:b}", esr.ec);
-        }
-    }
-    println!("-------------------------------------");
-
-    set_return_to_kernel_main();
-}
-
-fn clear_interrupt_for_source(source: IRQSource) {
-    match source {
-        IRQSource::UartInt => clear_uart_interrupt_state(),
-        _ => {
-            todo!()
-        }
-    }
-}
-
-fn set_return_to_kernel_main() {
-    unsafe {
-        asm!("ldr x0, =kernel_main", "msr ELR_EL1, x0");
-        asm!("mov x0, #(0b0101)", "msr SPSR_EL1, x0");
-    }
-}
-
-fn handle_gpio_interrupt() {
-    println!("Interrupt");
-    for i in 0..=53u32 {
-        let val = read_gpio_event_detect_status(i);
-
-        if val {
-            #[allow(clippy::single_match)]
-            match i {
-                26 => {
-                    println!("Button Pressed");
-                }
-                _ => {}
-            }
-            // Reset GPIO Interrupt handler by writing a 1
-            reset_gpio_event_detect_status(i);
-        }
-    }
-    unmask_irq();
-}
-
-/// Enables IRQ Source
-pub fn enable_irq_source(state: IRQSource) {
-    let nr = state as u32;
-    let register = ENABLE_IRQ_BASE + 4 * (nr / 32);
-    let register_offset = nr % 32;
-    let current = unsafe { read_address(register) };
-    let mask = 0b1 << register_offset;
-    let new_val = current | mask;
-    unsafe { write_address(register, new_val) };
-}
-
-/// Disable IRQ Source
-pub fn disable_irq_source(state: IRQSource) {
-    let nr = state as u32;
-    let register = DISABLE_IRQ_BASE + 4 * (nr / 32);
-    let register_offset = nr % 32;
-    let current = unsafe { read_address(register) };
-    let mask = 0b1 << register_offset;
-    let new_val = current | mask;
-    unsafe { write_address(register, new_val) };
-}
-
-/// Read current IRQ Source status
-pub fn read_irq_source_status(state: IRQSource) -> u32 {
-    let nr = state as u32;
-    let register = ENABLE_IRQ_BASE + 4 * (nr / 32);
-    let register_offset = nr % 32;
-    (unsafe { read_address(register) } >> register_offset) & 0b1
-}
-
-/// Status if a IRQ Source is pending
-pub fn is_irq_source_pending(state: IRQSource) -> bool {
-    let nr = state as u32;
-    let register = IRQ_PENDING_BASE + 4 * (nr / 32);
-    let register_offset = nr % 32;
-    ((unsafe { read_address(register) } >> register_offset) & 0b1) != 0
-}
-
-/// Status if a IRQ Source is pending
-pub fn get_irq_pending_sources() -> u64 {
-    let mut pending = unsafe { read_address(IRQ_PENDING_BASE + 4) as u64 } << 32;
-    pending |= unsafe { read_address(IRQ_PENDING_BASE) as u64 };
-    pending
-}
-
-#[inline(always)]
-pub fn initialize_interrupt_handler() {
-    unsafe { INTERRUPT_HANDLERS = Some(Vec::new()) };
-}
-
-pub fn register_interrupt_handler(source: IRQSource, function: fn()) {
-    if let Some(handler_vec) = unsafe { &mut *core::ptr::addr_of_mut!(INTERRUPT_HANDLERS) } {
-        handler_vec.push(InterruptHandlers { source, function });
-    }
-}

src/irq_interrupt.rs

@@ -0,0 +1,162 @@
+use core::{
+    arch::asm,
+    sync::atomic::{compiler_fence, Ordering},
+};
+
+use crate::{
+    mmio_read, mmio_write,
+    peripherals::gpio::{blink_gpio, SpecificGpio},
+    timer::sleep_s,
+};
+
+const INTERRUPT_BASE: u32 = 0x3F00_B000;
+const IRQ_PENDING_BASE: u32 = INTERRUPT_BASE + 0x204;
+const ENABLE_IRQ_BASE: u32 = INTERRUPT_BASE + 0x210;
+const DISABLE_IRQ_BASE: u32 = INTERRUPT_BASE + 0x21C;
+
+// GPIO
+const GPEDS_BASE: u32 = 0x3F20_0040;
+
+#[repr(u32)]
+pub enum IRQState {
+    AuxInt = 29,
+    I2cSpiSlvInt = 44,
+    Pwa0 = 45,
+    Pwa1 = 46,
+    Smi = 48,
+    GpioInt0 = 49,
+    GpioInt1 = 50,
+    GpioInt2 = 51,
+    GpioInt3 = 52,
+    I2cInt = 53,
+    SpiInt = 54,
+    PcmInt = 55,
+    UartInt = 57,
+}
+
+#[no_mangle]
+unsafe extern "C" fn irq_handler() {
+    handle_gpio_interrupt();
+}
+
+#[no_mangle]
+unsafe extern "C" fn synchronous_interrupt() {
+    loop {
+        println!("Sync Exception");
+        blink_gpio(SpecificGpio::OnboardLed as u8, 100);
+        esr_uart_dump();
+        sleep_s(200);
+    }
+}
+
+fn esr_uart_dump() {
+    let esr: u32;
+    unsafe {
+        asm!(
+            "mrs {esr:x}, ESR_EL1",
+            esr = out(reg) esr
+        );
+    }
+    for i in (0..32).rev() {
+        if ((esr >> i) & 1) == 0 {
+            print!("0");
+        } else {
+            print!("1");
+        }
+        if i % 4 == 0 && i > 0 {
+            print!("_");
+        }
+
+        if i == 26 || i == 25 || i == 0 {
+            print!("\n\r");
+        }
+    }
+}
+
+fn handle_gpio_interrupt() {
+    println!("Interrupt");
+    for i in 0..=53u32 {
+        let val = read_gpio_event_detect_status(i);
+
+        if val {
+            #[allow(clippy::single_match)]
+            match i {
+                26 => print!("Button Pressed"),
+                _ => {}
+            }
+            // Reset GPIO Interrupt handler by writing a 1
+            reset_gpio_event_detect_status(i);
+        }
+    }
+    enable_irq();
+}
+
+/// Get current interrupt status of a GPIO pin
+pub fn read_gpio_event_detect_status(id: u32) -> bool {
+    let register = GPEDS_BASE + (id / 32) * 4;
+    let register_offset = id % 32;
+
+    let val = mmio_read(register) >> register_offset;
+    (val & 0b1) != 0
+}
+
+/// Resets current interrupt status of a GPIO pin
+pub fn reset_gpio_event_detect_status(id: u32) {
+    let register = GPEDS_BASE + (id / 32) * 4;
+    let register_offset = id % 32;
+
+    mmio_write(register, 0b1 << register_offset);
+    compiler_fence(Ordering::SeqCst);
+}
+
+/// Enables IRQ Source
+pub fn enable_irq_source(state: IRQState) {
+    let nr = state as u32;
+    let register = ENABLE_IRQ_BASE + 4 * (nr / 32);
+    let register_offset = nr % 32;
+    let current = mmio_read(register);
+    let mask = 0b1 << register_offset;
+    let new_val = current | mask;
+    mmio_write(register, new_val);
+}
+
+/// Disable IRQ Source
+pub fn disable_irq_source(state: IRQState) {
+    let nr = state as u32;
+    let register = DISABLE_IRQ_BASE + 4 * (nr / 32);
+    let register_offset = nr % 32;
+    let current = mmio_read(register);
+    let mask = 0b1 << register_offset;
+    let new_val = current | mask;
+    mmio_write(register, new_val);
+}
+
+/// Read current IRQ Source status
+pub fn read_irq_source_status(state: IRQState) -> u32 {
+    let nr = state as u32;
+    let register = ENABLE_IRQ_BASE + 4 * (nr / 32);
+    let register_offset = nr % 32;
+    (mmio_read(register) >> register_offset) & 0b1
+}
+
+/// Status if a IRQ Source is enabled
+pub fn read_irq_pending(state: IRQState) -> bool {
+    let nr = state as u32;
+    let register = IRQ_PENDING_BASE + 4 * (nr / 32);
+    let register_offset = nr % 32;
+    ((mmio_read(register) >> register_offset) & 0b1) != 0
+}
+
+/// Clears the IRQ DAIF Mask
+///
+/// Enables IRQ interrupts
+pub fn enable_irq() {
+    unsafe { asm!("msr DAIFClr, #0x2") }
+}
+
+/// Clears the IRQ DAIF Mask
+///
+/// Disable IRQ interrupts
+pub fn disable_irq() {
+    unsafe { asm!("msr DAIFSet, #0x2") }
+}

src/lib.rs

@@ -1,85 +1,64 @@
 #![no_std]
 #![allow(clippy::missing_safety_doc)]
-
-extern crate alloc;
-
-use alloc::boxed::Box;
 use core::{
-    arch::asm,
     panic::PanicInfo,
     ptr::{read_volatile, write_volatile},
 };
 
 use heap::Heap;
 
-use crate::{
-    aarch64::mmu::{
-        allocate_memory, PhysSource, KERNEL_VIRTUAL_MEM_SPACE, LEVEL2_BLOCK_SIZE, NORMAL_MEM, UXN,
-        WRITABLE,
-    },
-    interrupt_handlers::initialize_interrupt_handler,
-    logger::DefaultLogger,
-};
-
-static PERIPHERAL_BASE: usize = 0x3F00_0000;
-
 unsafe extern "C" {
-    unsafe static mut __kernel_end: u8;
+    unsafe static mut __heap_start: u8;
+    unsafe static mut __heap_end: u8;
 }
 
 #[global_allocator]
 pub static mut GLOBAL_ALLOCATOR: Heap = Heap::empty();
 
-pub unsafe fn init_kernel_heap() {
-    let start = core::ptr::addr_of_mut!(__kernel_end) as usize | KERNEL_VIRTUAL_MEM_SPACE;
-    let size = LEVEL2_BLOCK_SIZE * 2;
+pub unsafe fn init_heap() {
+    let start = core::ptr::addr_of_mut!(__heap_start) as usize;
+    let end = core::ptr::addr_of_mut!(__heap_end) as usize;
 
-    allocate_memory(start, size, PhysSource::Any, NORMAL_MEM | UXN | WRITABLE).unwrap();
     let heap = core::ptr::addr_of_mut!(GLOBAL_ALLOCATOR);
-    (*heap).init(start, start + size);
+    (*heap).init(start, end);
 }
 
 #[panic_handler]
 fn panic(_panic: &PanicInfo) -> ! {
     loop {
-        println!("Panic: {}", _panic.message());
+        println!("Panic");
     }
 }
 
+#[macro_export]
+macro_rules! print {
+    () => {};
+    ($($arg:tt)*) => {
+        $crate::peripherals::uart::_print(format_args!($($arg)*))
+    };
+}
+
+#[macro_export]
+macro_rules! println {
+    () => {};
+    ($($arg:tt)*) => {
+        print!($($arg)*);
+        print!("\r\n");
+    };
+}
+
 pub mod peripherals;
 
-pub mod aarch64;
 pub mod configuration;
 pub mod framebuffer;
-pub mod interrupt_handlers;
-pub mod logger;
+pub mod irq_interrupt;
+pub mod mailbox;
+pub mod timer;
 
-pub mod pi3;
-
-#[inline(always)]
-pub unsafe fn read_address(address: u32) -> u32 {
+pub fn mmio_read(address: u32) -> u32 {
     unsafe { read_volatile(address as *const u32) }
 }
 
-#[inline(always)]
-pub unsafe fn write_address(address: u32, data: u32) {
+pub fn mmio_write(address: u32, data: u32) {
     unsafe { write_volatile(address as *mut u32, data) }
 }
-
-pub fn get_current_el() -> u64 {
-    let el: u64;
-    unsafe {
-        asm!(
-            "mrs {el}, CurrentEL",
-            el = out(reg) el,
-            options(nomem, nostack, preserves_flags)
-        );
-    }
-    el >> 2
-}
-
-pub fn initialize_kernel() {
-    unsafe { init_kernel_heap() };
-    logger::set_logger(Box::new(DefaultLogger));
-    initialize_interrupt_handler();
-}

src/logger.rs

@@ -1,45 +0,0 @@
-use core::fmt::Write;
-
-use alloc::{boxed::Box, fmt};
-
-use crate::peripherals::uart;
-
-static mut LOGGER: Option<Box<dyn Logger>> = None;
-
-pub trait Logger: Write + Sync {
-    fn flush(&mut self);
-}
-
-pub struct DefaultLogger;
-
-impl Logger for DefaultLogger {
-    fn flush(&mut self) {}
-}
-
-impl Write for DefaultLogger {
-    fn write_str(&mut self, s: &str) -> core::fmt::Result {
-        uart::Uart.write_str(s)
-    }
-}
-
-#[macro_export]
-macro_rules! log {
-    () => {};
-    ($($arg:tt)*) => {
-        $crate::logger::log(format_args!($($arg)*))
-    };
-}
-
-pub fn log(args: fmt::Arguments) {
-    if let Some(logger) = unsafe { &mut *core::ptr::addr_of_mut!(LOGGER) } {
-        logger.write_str("\n").unwrap();
-        logger.write_fmt(args).unwrap();
-        logger.flush();
-    }
-}
-
-pub fn set_logger(logger: Box<dyn Logger>) {
-    unsafe {
-        LOGGER = Some(logger);
-    }
-}

src/mailbox.rs

@@ -1,4 +1,4 @@
-use crate::{read_address, write_address};
+use crate::{mmio_read, mmio_write};
 use nova_error::NovaError;
 
 const MBOX_BASE: u32 = 0x3F00_0000 + 0xB880;
@@ -27,7 +27,7 @@ macro_rules! max {
 #[macro_export]
 macro_rules! mailbox_command {
     ($name:ident, $tag:expr, $request_len:expr,$response_len:expr) => {
-        /// More information at: <https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface>
+        /// More information at: https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
         pub fn $name(
             request_data: [u32; $request_len / 4],
         ) -> Result<[u32; $response_len / 4], NovaError> {
@@ -59,16 +59,16 @@ macro_rules! mailbox_command {
     };
 }
 
-mailbox_command!(read_soc_temp, 0x0003_0006, 4, 8);
+mailbox_command!(mb_read_soc_temp, 0x0003_0006, 4, 8);
 
 // Framebuffer
-mailbox_command!(get_display_resolution, 0x0004_0003, 0, 8);
+mailbox_command!(mb_get_display_resolution, 0x0004_0003, 0, 8);
 
 pub fn read_mailbox(channel: u32) -> u32 {
     // Wait until mailbox is not empty
     loop {
-        while unsafe { read_address(MBOX_STATUS) } & MAIL_EMPTY != 0 {}
-        let mut data = unsafe { read_address(MBOX_READ) };
+        while mmio_read(MBOX_STATUS) & MAIL_EMPTY != 0 {}
+        let mut data = mmio_read(MBOX_READ);
         let read_channel = data & 0xF;
 
         data >>= 4;
@@ -80,6 +80,6 @@ pub fn read_mailbox(channel: u32) -> u32 {
 }
 
 pub fn write_mailbox(channel: u32, data: u32) {
-    while unsafe { read_address(MBOX_STATUS) } & MAIL_FULL != 0 {}
-    unsafe { write_address(MBOX_WRITE, (data & !0xF) | (channel & 0xF)) };
+    while mmio_read(MBOX_STATUS) & MAIL_FULL != 0 {}
+    mmio_write(MBOX_WRITE, (data & !0xF) | (channel & 0xF));
 }

src/main.rs

@@ -1,5 +1,6 @@
 #![no_main]
 #![no_std]
+#![feature(asm_experimental_arch)]
 #![allow(static_mut_refs)]
 #![allow(clippy::missing_safety_doc)]
 use core::{
@@ -9,13 +10,12 @@ use core::{
 
 extern crate alloc;
 
-use alloc::vec::Vec;
+use alloc::boxed::Box;
 use nova::{
-    aarch64::registers::{daif, read_id_aa64mmfr0_el1},
-    configuration::mmu::initialize_mmu_translation_tables,
     framebuffer::{FrameBuffer, BLUE, GREEN, RED},
-    get_current_el,
-    interrupt_handlers::{enable_irq_source, IRQSource},
+    init_heap,
+    irq_interrupt::enable_irq_source,
+    mailbox::mb_read_soc_temp,
     peripherals::{
         gpio::{
             blink_gpio, gpio_pull_up, set_falling_edge_detect, set_gpio_function, GPIOFunction,
@@ -23,18 +23,14 @@ use nova::{
         },
         uart::uart_init,
     },
-    println,
+    print, println,
+    timer::{delay_nops, sleep_us},
 };
 
 global_asm!(include_str!("vector.S"));
-global_asm!(include_str!("config.S"));
-
-static mut FRAMEBUFFER: Option<FrameBuffer> = None;
 
 extern "C" {
     fn el2_to_el1();
-    fn el1_to_el0();
-    fn configure_mmu_el1();
     static mut __bss_start: u32;
     static mut __bss_end: u32;
 }
@@ -61,20 +57,12 @@ pub extern "C" fn main() -> ! {
     // Set ACT Led to Outout
     let _ = set_gpio_function(21, GPIOFunction::Output);
 
+    // Delay so clock speed can stabilize
+    delay_nops(50000);
     println!("Hello World!");
-    println!("Exception level: {}", get_current_el());
-
-    unsafe {
-        initialize_mmu_translation_tables();
-        configure_mmu_el1();
-        println!("MMU initialized...");
-    };
-
-    println!("Register: AA64MMFR0_EL1: {:064b}", read_id_aa64mmfr0_el1());
-    println!("Moving El2->EL1");
-    unsafe { FRAMEBUFFER = Some(FrameBuffer::default()) };
 
     unsafe {
+        asm!("mrs x0, SCTLR_EL1");
         el2_to_el1();
     }
 
@@ -92,68 +80,63 @@ unsafe fn zero_bss() {
 
 #[no_mangle]
 pub extern "C" fn kernel_main() -> ! {
-    println!("Kernel Start...");
-    nova::initialize_kernel();
-    let mut test_vector = Vec::new();
-    for i in 0..20 {
-        test_vector.push(i);
-    }
-    println!("heap allocation test: {:?}", test_vector);
-
-    println!("Exception Level: {}", get_current_el());
-    daif::unmask_all();
+    println!("EL: {}", get_current_el());
 
     unsafe {
-        el1_to_el0();
+        init_heap();
+        heap_test();
     };
 
-    #[allow(clippy::empty_loop)]
-    loop {}
-}
-
-#[no_mangle]
-pub extern "C" fn el0() -> ! {
-    println!("Jumped into EL0");
+    sleep_us(500_000);
 
     // Set GPIO 26 to Input
-    enable_irq_source(IRQSource::GpioInt0); //26 is on the first GPIO bank
+    enable_irq_source(nova::irq_interrupt::IRQState::GpioInt0); //26 is on the first GPIO bank
     let _ = set_gpio_function(26, GPIOFunction::Input);
     gpio_pull_up(26);
     set_falling_edge_detect(26, true);
 
-    enable_irq_source(IRQSource::UartInt);
+    let fb = FrameBuffer::default();
 
-    if let Some(fb) = unsafe { FRAMEBUFFER.as_mut() } {
-        for i in 0..1080 {
-            fb.draw_pixel(50, i, BLUE);
-        }
     fb.draw_square(500, 500, 600, 700, RED);
     fb.draw_square_fill(800, 800, 900, 900, GREEN);
     fb.draw_square_fill(1000, 800, 1200, 700, BLUE);
     fb.draw_square_fill(900, 100, 800, 150, RED | BLUE);
     fb.draw_string("Hello World! :D\nTest next Line", 500, 5, 3, BLUE);
 
-        fb.draw_function(cos, 0, 101, RED);
-    }
+    fb.draw_function(cos, 100, 101, RED);
 
     loop {
-        // TODO: Mailbox requires a physical address. The stack is now in VA space causing an issue.
-        // Fix with SVCs ?
-
-        // let temp = mailbox::read_soc_temp([0]).unwrap();
-        // println!("{} °C", temp[1] / 1000);
+        let temp = mb_read_soc_temp([0]).unwrap();
+        println!("{} °C", temp[1] / 1000);
 
         blink_gpio(SpecificGpio::OnboardLed as u8, 500);
     }
 }
 
+unsafe fn heap_test() {
+    let b = Box::new([1, 2, 3, 4]);
+    println!("{:?}", b);
+}
+
 fn cos(x: u32) -> f64 {
     libm::cos(x as f64 * 0.1) * 20.0
 }
 
+fn get_current_el() -> u64 {
+    let el: u64;
+    unsafe {
+        asm!(
+            "mrs {el}, CurrentEL",
+            el = out(reg) el,
+            options(nomem, nostack, preserves_flags)
+        );
+    }
+    el >> 2
+}
+
 fn enable_uart() {
+    uart_init();
     // Set GPIO Pins to UART
     let _ = set_gpio_function(14, GPIOFunction::Alternative0);
     let _ = set_gpio_function(15, GPIOFunction::Alternative0);
-    uart_init();
 }

src/peripherals/gpio.rs

@@ -1,19 +1,17 @@
 use core::result::Result;
 use core::result::Result::Ok;
-use core::sync::atomic::{compiler_fence, Ordering};
 
-use crate::pi3::timer::{delay_nops, sleep_ms};
-use crate::{read_address, write_address};
+use crate::timer::{delay_nops, sleep_ms};
+use crate::{mmio_read, mmio_write};
 
 const GPFSEL_BASE: u32 = 0x3F20_0000;
 const GPSET_BASE: u32 = 0x3F20_001C;
 const GPCLR_BASE: u32 = 0x3F20_0028;
 const GPLEV_BASE: u32 = 0x3F20_0034;
-const GPEDS_BASE: u32 = 0x3F20_0040;
-const GPFEN_BASE: u32 = 0x3F20_0058;
 const GPPUD: u32 = 0x3F20_0094;
 const GPPUDCLK_BASE: u32 = 0x3F20_0098;
 const GPREN_BASE: u32 = 0x3F20_004C;
+const GPFEN_BASE: u32 = 0x3F20_0058;
 
 #[repr(u8)]
 pub enum SpecificGpio {
@@ -37,27 +35,26 @@ pub fn set_gpio_function(gpio: u8, state: GPIOFunction) -> Result<(), &'static s
     let register_index = gpio / 10;
     let register_offset = (gpio % 10) * 3;
     let register_addr = GPFSEL_BASE + (register_index as u32 * 4);
-    let current = unsafe { read_address(register_addr) };
+    let current = mmio_read(register_addr);
 
     let mask = !(0b111 << register_offset);
     let cleared = current & mask;
 
     let new_val = cleared | ((state as u32) << register_offset);
 
-    unsafe { write_address(register_addr, new_val) };
+    mmio_write(register_addr, new_val);
     Ok(())
 }
 
 /// Set the GPIO to high
 ///
-/// Should be used when GPIO function is set to `OUTPUT` via `set_gpio_function`,
-/// otherwise setting is ignored
+/// Should be used when GPIO function is set to `OUTPUT` via `set_gpio_function`
 pub fn gpio_high(gpio: u8) -> Result<(), &'static str> {
     let register_index = gpio / 32;
     let register_offset = gpio % 32;
     let register_addr = GPSET_BASE + (register_index as u32 * 4);
 
-    unsafe { write_address(register_addr, 1 << register_offset) };
+    mmio_write(register_addr, 1 << register_offset);
     Ok(())
 }
 
@@ -69,7 +66,7 @@ pub fn gpio_low(gpio: u8) -> Result<(), &'static str> {
     let register_offset = gpio % 32;
     let register_addr = GPCLR_BASE + (register_index as u32 * 4);
 
-    unsafe { write_address(register_addr, 1 << register_offset) };
+    mmio_write(register_addr, 1 << register_offset);
     Ok(())
 }
 
@@ -79,7 +76,7 @@ pub fn gpio_get_state(gpio: u8) -> u8 {
     let register_offset = gpio % 32;
     let register_addr = GPLEV_BASE + (register_index as u32 * 4);
 
-    let state = unsafe { read_address(register_addr) };
+    let state = mmio_read(register_addr);
     ((state >> register_offset) & 0b1) as u8
 }
 
@@ -103,40 +100,40 @@ fn gpio_pull_up_down(gpio: u8, val: u32) {
     let register_offset = gpio % 32;
 
     // 1. Write Pull up
-    unsafe { write_address(GPPUD, val) };
+    mmio_write(GPPUD, val);
 
     // 2. Delay 150 cycles
     delay_nops(150);
 
     // 3. Write to clock
     let new_val = 0b1 << register_offset;
-    unsafe { write_address(register_addr, new_val) };
+    mmio_write(register_addr, new_val);
 
     // 4. Delay 150 cycles
     delay_nops(150);
 
     // 5. reset GPPUD
-    unsafe { write_address(GPPUD, 0) };
+    mmio_write(GPPUD, 0);
 
     // 6. reset clock
-    unsafe { write_address(register_addr, 0) };
+    mmio_write(register_addr, 0);
 }
 
-/// Get the current status of the falling edge detection
+/// Get the current status if falling edge detection is set
 pub fn read_falling_edge_detect(gpio: u8) -> bool {
     let register_addr = GPFEN_BASE + 4 * (gpio as u32 / 32);
     let register_offset = gpio % 32;
 
-    let current = unsafe { read_address(register_addr) };
+    let current = mmio_read(register_addr);
     ((current >> register_offset) & 0b1) != 0
 }
 
-/// Get the current status of the rising edge detection
+/// Get the current status if falling edge detection is set
 pub fn read_rising_edge_detect(gpio: u8) -> bool {
     let register_addr = GPREN_BASE + 4 * (gpio as u32 / 32);
     let register_offset = gpio % 32;
 
-    let current = unsafe { read_address(register_addr) };
+    let current = mmio_read(register_addr);
     ((current >> register_offset) & 0b1) != 0
 }
 
@@ -145,7 +142,7 @@ pub fn set_falling_edge_detect(gpio: u8, enable: bool) {
     let register_addr = GPFEN_BASE + 4 * (gpio as u32 / 32);
     let register_offset = gpio % 32;
 
-    let current = unsafe { read_address(register_addr) };
+    let current = mmio_read(register_addr);
     let mask = 0b1 << register_offset;
     let new_val = if enable {
         current | mask
@@ -153,7 +150,7 @@ pub fn set_falling_edge_detect(gpio: u8, enable: bool) {
         current & !mask
     };
 
-    unsafe { write_address(register_addr, new_val) };
+    mmio_write(register_addr, new_val);
 }
 
 /// Enables rising edge detection
@@ -161,7 +158,7 @@ pub fn set_rising_edge_detect(gpio: u8, enable: bool) {
     let register_addr = GPREN_BASE + 4 * (gpio as u32 / 32);
     let register_offset = gpio % 32;
 
-    let current = unsafe { read_address(register_addr) };
+    let current = mmio_read(register_addr);
 
     let mask = 0b1 << register_offset;
     let new_val = if enable {
@@ -170,32 +167,9 @@ pub fn set_rising_edge_detect(gpio: u8, enable: bool) {
         current & !mask
     };
 
-    unsafe { write_address(register_addr, new_val) };
+    mmio_write(register_addr, new_val);
 }
 
-/// Returns with the interrupt status of an GPIO.
-///
-/// GPEDS register is used to record level and edge events on the GPIO pins.
-/// When an event is triggered by the GPIO, the corresponding bit will be set to 1.
-pub fn read_gpio_event_detect_status(id: u32) -> bool {
-    let register = GPEDS_BASE + (id / 32) * 4;
-    let register_offset = id % 32;
-
-    let val = unsafe { read_address(register) } >> register_offset;
-    (val & 0b1) != 0
-}
-
-/// Resets current interrupt status of a GPIO pin.
-pub fn reset_gpio_event_detect_status(id: u32) {
-    let register = GPEDS_BASE + (id / 32) * 4;
-    let register_offset = id % 32;
-
-    unsafe { write_address(register, 0b1 << register_offset) };
-    compiler_fence(Ordering::SeqCst);
-}
-
-// TODO: GPHEN,GPLEN,GPAREN,GPAFEN
-
 pub fn blink_gpio(gpio: u8, duration_ms: u64) {
     let _ = gpio_high(gpio);
 

src/peripherals/uart.rs

@@ -3,7 +3,7 @@ use core::{
     fmt::{self, Write},
 };
 
-use crate::{read_address, write_address};
+use crate::{mmio_read, mmio_write};
 
 const BAUD: u32 = 115200;
 const UART_CLK: u32 = 48_000_000;
@@ -18,55 +18,35 @@ const UART0_FBRD: u32 = 0x3F20_1028;
 
 const UART0_CR: u32 = 0x3F20_1030;
 const UART0_CR_UARTEN: u32 = 1 << 0;
-
 const UART0_CR_TXE: u32 = 1 << 8;
-const UART0_CR_RXE: u32 = 1 << 9;
 
 const UART0_LCRH: u32 = 0x3F20_102C;
 const UART0_LCRH_FEN: u32 = 1 << 4;
 
-const UART0_IMSC: u32 = 0x3F20_1038;
-const UART0_IMSC_RXIM: u32 = 1 << 4;
-
-const UART0_ICR: u32 = 0x3F20_1044;
-
 pub struct Uart;
 
 impl Write for Uart {
     fn write_str(&mut self, s: &str) -> core::fmt::Result {
         for byte in s.bytes() {
-            while (unsafe { read_address(UART0_FR) } & UART0_FR_TXFF) != 0 {
+            while (mmio_read(UART0_FR) & UART0_FR_TXFF) != 0 {
                 unsafe { asm!("nop") }
             }
-            unsafe { write_address(UART0_DR, byte as u32) };
+            mmio_write(UART0_DR, byte as u32);
         }
         // wait till uart is not busy anymore
-        while ((unsafe { read_address(UART0_FR) } >> 3) & 0b1) != 0 {}
+        while ((mmio_read(UART0_FR) >> 3) & 0b1) != 0 {}
         Ok(())
     }
 }
 
-#[macro_export]
-macro_rules! print {
-    () => {};
-    ($($arg:tt)*) => {
-        $crate::peripherals::uart::_print(format_args!($($arg)*))
-    };
-}
-
-#[macro_export]
-macro_rules! println {
-    () => {};
-    ($($arg:tt)*) => {
-        $crate::print!($($arg)*);
-        $crate::print!("\r\n");
-    };
-}
-
 pub fn _print(args: fmt::Arguments) {
     let _ = Uart.write_fmt(args);
 }
 
+pub fn _print_str(st: &str) {
+    let _ = Uart.write_str(st);
+}
+
 /// Initialize UART peripheral
 pub fn uart_init() {
     let baud_div_times_64 = (UART_CLK * 4) / BAUD;
@@ -75,26 +55,23 @@ pub fn uart_init() {
     let fbrd = baud_div_times_64 % 64;
 
     uart_enable(false);
-    uart_fifo_enable(true);
+    uart_fifo_enable(false);
 
-    unsafe {
-        write_address(UART0_IBRD, ibrd);
-        write_address(UART0_FBRD, fbrd);
-    }
+    mmio_write(UART0_IBRD, ibrd);
+    mmio_write(UART0_FBRD, fbrd);
 
-    uart_enable_rx_interrupt();
     uart_set_lcrh(0b11, true);
 
-    // Enable transmit, receive and uart
-    let mut cr = unsafe { read_address(UART0_CR) };
-    cr |= UART0_CR_UARTEN | UART0_CR_TXE | UART0_CR_RXE;
+    // Enable transmit and uart
+    let mut cr = mmio_read(UART0_CR);
+    cr |= UART0_CR_UARTEN | UART0_CR_TXE;
 
-    unsafe { write_address(UART0_CR, cr) };
+    mmio_write(UART0_CR, cr);
 }
 
 /// Enable UARTEN
 fn uart_enable(enable: bool) {
-    let mut cr = unsafe { read_address(UART0_CR) };
+    let mut cr = mmio_read(UART0_CR);
 
     if enable {
         cr |= UART0_CR_UARTEN;
@@ -102,12 +79,12 @@ fn uart_enable(enable: bool) {
         cr &= !UART0_CR_UARTEN;
     }
 
-    unsafe { write_address(UART0_CR, cr) };
+    mmio_write(UART0_CR, cr);
 }
 
 /// Enable UART FIFO
 fn uart_fifo_enable(enable: bool) {
-    let mut lcrh = unsafe { read_address(UART0_LCRH) };
+    let mut lcrh = mmio_read(UART0_LCRH);
 
     if enable {
         lcrh |= UART0_LCRH_FEN;
@@ -115,32 +92,14 @@ fn uart_fifo_enable(enable: bool) {
         lcrh &= !UART0_LCRH_FEN;
     }
 
-    unsafe { write_address(UART0_LCRH, lcrh) };
-}
-
-#[inline(always)]
-fn uart_enable_rx_interrupt() {
-    unsafe { write_address(UART0_IMSC, UART0_IMSC_RXIM) };
+    mmio_write(UART0_LCRH, lcrh);
 }
 
 /// Set UART word length and set FIFO status
-#[inline(always)]
 fn uart_set_lcrh(wlen: u32, enable_fifo: bool) {
     let mut value = (wlen & 0b11) << 5;
     if enable_fifo {
         value |= UART0_LCRH_FEN;
     }
-    unsafe { write_address(UART0_LCRH, value) };
-}
-
-#[inline(always)]
-pub fn read_uart_data() -> char {
-    (unsafe { read_address(UART0_DR) } & 0xFF) as u8 as char
-}
-
-#[inline(always)]
-pub fn clear_uart_interrupt_state() {
-    unsafe {
-        write_address(UART0_ICR, 1 << 4);
-    }
+    mmio_write(UART0_LCRH, value);
 }

src/pi3/mod.rs

@@ -1,3 +0,0 @@
-pub mod mailbox;
-pub mod power_management;
-pub mod timer;

src/pi3/power_management.rs

@@ -1,28 +0,0 @@
-use core::ptr::{read_volatile, write_volatile};
-
-use crate::PERIPHERAL_BASE;
-
-/// Power Management Base
-static PM_BASE: u32 = PERIPHERAL_BASE as u32 + 0x10_0000;
-static PM_RSTC: u32 = PM_BASE + 0x1c;
-static PM_WDOG: u32 = PM_BASE + 0x24;
-
-static PM_PASSWORD: u32 = 0x5a000000;
-static PM_WDOG_TIMER_MASK: u32 = 0x000fffff;
-static PM_RSTC_WRCFG_CLR: u32 = 0xffffffcf;
-static PM_RSTC_WRCFG_FULL_RESET: u32 = 0x00000020;
-
-pub fn reboot_system() {
-    unsafe {
-        let pm_rstc_val = read_volatile(PM_RSTC as *mut u32);
-        // (31:16) bits -> password
-        // (11:0) bits -> value
-        write_volatile(PM_WDOG as *mut u32, PM_PASSWORD | (1 & PM_WDOG_TIMER_MASK));
-        write_volatile(
-            PM_RSTC as *mut u32,
-            PM_PASSWORD | (pm_rstc_val & PM_RSTC_WRCFG_CLR) | PM_RSTC_WRCFG_FULL_RESET,
-        );
-    }
-    #[allow(clippy::empty_loop)]
-    loop {}
-}

src/terminal.rs

@@ -1,53 +0,0 @@
-use core::fmt::Write;
-
-use alloc::string::String;
-use nova::{
-    interrupt_handlers::register_interrupt_handler, logger::Logger,
-    peripherals::uart::read_uart_data, print, println,
-};
-
-pub struct Terminal {
-    buffer: String,
-    input: String,
-}
-
-impl Terminal {
-    pub fn new() -> Self {
-        Self {
-            buffer: String::new(),
-            input: String::new(),
-        }
-    }
-
-    fn flush(&mut self) {
-        println!("{}", self.buffer);
-        print!("> {}", self.input);
-        self.buffer.clear();
-    }
-}
-
-impl Write for Terminal {
-    fn write_str(&mut self, s: &str) -> core::fmt::Result {
-        self.buffer.push_str(s);
-        Ok(())
-    }
-}
-
-impl Logger for Terminal {
-    fn flush(&mut self) {
-        println!("{}", self.buffer);
-        print!("> {}", self.input);
-        self.buffer.clear();
-    }
-}
-
-fn terminal_uart_rx_interrupt_handler() {
-    print!("{}", read_uart_data());
-}
-
-pub fn register_terminal_interrupt_handler() {
-    register_interrupt_handler(
-        nova::interrupt_handlers::IRQSource::UartInt,
-        terminal_uart_rx_interrupt_handler,
-    );
-}

src/vector.S

@@ -1,29 +1,59 @@
-.section .vector_table  , "ax"
+
+.global vector_table
 .extern irq_handler
 
 .macro    ventry    label
-.align    11
+.align    7
 b    \label
 .endm
 
-.global vector_table
+.section .vector_table, "ax"
 vector_table:
     ventry .
     ventry .
     ventry .
     ventry .
 
-    ventry synchronous_interrupt_no_el_change  // Synchronous Exception  0x200
+    ventry synchronous_interrupt      // Synchronous Exception  0x200
     ventry irq_handler                // IRQ(Interrupt Request) 0x280
     ventry .
     ventry .
 
-    ventry synchronous_interrupt_imm_lower_aarch64
-    ventry irq_handler
-    ventry .
-    ventry .
 
-    ventry .
-    ventry .
-    ventry .
-    ventry .
+.align 4
+.global el2_to_el1
+el2_to_el1:
+
+    mov x0, #(1 << 31)
+    msr HCR_EL2, x0
+
+    // Set SPSR_EL2: return to EL1h
+    mov x0, #(0b0101)
+    msr SPSR_EL2, x0
+
+    // Set return address to ELR_EL2
+    ldr x0, =kernel_main
+    msr ELR_EL2, x0
+
+    // Set SP_EL1 to stack base
+    ldr x0, =__stack_end
+    msr SP_EL1, x0
+
+    // Set VBAR_EL1 to vector table
+    adr x0, vector_table
+    msr VBAR_EL1, x0
+
+    // Disable MMU
+    ldr x0, =SCTLR_EL1_CONF
+    msr sctlr_el1, x0
+
+    // SIMD should not be trapped
+    mrs x0, CPACR_EL1
+    mov x1, #(0b11<<20)
+    orr x0,x0, x1
+    msr CPACR_EL1,x0
+
+    isb
+
+    // Return to EL1
+    eret

tools/deply_to_hw.sh

@@ -15,7 +15,7 @@ REMOTE_DIR="$TFTP_PATH"
 
 # BUILD
 echo "[*] Building kernel..."
-cargo build --release --target aarch64-unknown-none
+cargo build --release
 
 # CONVERT TO IMG
 echo "[*] Convert kernel elf to img..."

tools/start_simulator.sh

@@ -1,5 +1,3 @@
-set -e
-
 cargo build --target aarch64-unknown-none --release
 cd "$(dirname "$0")"
 

tools/start_simulator_debug.sh

@@ -1,5 +1,3 @@
-set -e
-
 cargo build --target aarch64-unknown-none
 
 cd "$(dirname "$0")"
@@ -11,4 +9,6 @@ qemu-system-aarch64 \
   -cpu cortex-a53 \
   -serial stdio \
   -sd ../sd.img \
+  -display none \
   -kernel ../target/aarch64-unknown-none/debug/kernel8.img \
+  -s -S