Read SoC temp via mailboxes

This commit is contained in:
2025-07-18 14:41:19 +02:00
parent fe8e5e000a
commit fbc2fcff72
11 changed files with 91 additions and 51 deletions

View File

@@ -5,7 +5,11 @@ use core::{
use crate::{
mmio_read, mmio_write,
peripherals::{gpio::blink_gpio, uart::print},
peripherals::{
gpio::{blink_gpio, SpecificGpio},
uart::print,
},
timer::{sleep_ms, sleep_s},
};
const INTERRUPT_BASE: u32 = 0x3F00_B000;
@@ -41,10 +45,34 @@ unsafe extern "C" fn irq_handler() {
#[no_mangle]
unsafe extern "C" fn synchronous_interrupt() {
loop {
let el: u64;
asm!("mrs x5, FAR_EL1");
blink_gpio(29, 100);
print("Sync Exception \r\n");
blink_gpio(SpecificGpio::OnboardLed as u8, 100);
esr_uart_dump();
sleep_s(200);
}
}
fn esr_uart_dump() {
let esr: u32;
unsafe {
asm!(
"mrs {esr}, ESR_EL1",
esr = out(reg) esr
);
}
for i in (0..32).rev() {
if ((esr >> i) & 1) == 0 {
print("0");
} else {
print("1");
}
if i % 4 == 0 && i > 0 {
print("_");
}
if i == 26 || i == 25 || i == 0 {
print("\n\r");
}
}
}