mirror of
https://github.com/iceHtwoO/novaOS.git
synced 2026-04-17 20:52:27 +00:00
Add power management watchdog,
rework interrupts
This commit is contained in:
@@ -1,5 +1,6 @@
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use core::result::Result;
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use core::result::Result::Ok;
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use core::sync::atomic::{compiler_fence, Ordering};
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use crate::timer::{delay_nops, sleep_ms};
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use crate::{mmio_read, mmio_write};
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@@ -8,10 +9,11 @@ const GPFSEL_BASE: u32 = 0x3F20_0000;
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const GPSET_BASE: u32 = 0x3F20_001C;
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const GPCLR_BASE: u32 = 0x3F20_0028;
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const GPLEV_BASE: u32 = 0x3F20_0034;
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const GPEDS_BASE: u32 = 0x3F20_0040;
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const GPFEN_BASE: u32 = 0x3F20_0058;
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const GPPUD: u32 = 0x3F20_0094;
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const GPPUDCLK_BASE: u32 = 0x3F20_0098;
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const GPREN_BASE: u32 = 0x3F20_004C;
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const GPFEN_BASE: u32 = 0x3F20_0058;
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#[repr(u8)]
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pub enum SpecificGpio {
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@@ -48,7 +50,8 @@ pub fn set_gpio_function(gpio: u8, state: GPIOFunction) -> Result<(), &'static s
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/// Set the GPIO to high
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///
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/// Should be used when GPIO function is set to `OUTPUT` via `set_gpio_function`
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/// Should be used when GPIO function is set to `OUTPUT` via `set_gpio_function`,
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/// otherwise setting is ignored
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pub fn gpio_high(gpio: u8) -> Result<(), &'static str> {
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let register_index = gpio / 32;
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let register_offset = gpio % 32;
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@@ -119,7 +122,7 @@ fn gpio_pull_up_down(gpio: u8, val: u32) {
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mmio_write(register_addr, 0);
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}
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/// Get the current status if falling edge detection is set
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/// Get the current status of the falling edge detection
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pub fn read_falling_edge_detect(gpio: u8) -> bool {
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let register_addr = GPFEN_BASE + 4 * (gpio as u32 / 32);
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let register_offset = gpio % 32;
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@@ -128,7 +131,7 @@ pub fn read_falling_edge_detect(gpio: u8) -> bool {
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((current >> register_offset) & 0b1) != 0
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}
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/// Get the current status if falling edge detection is set
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/// Get the current status of the rising edge detection
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pub fn read_rising_edge_detect(gpio: u8) -> bool {
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let register_addr = GPREN_BASE + 4 * (gpio as u32 / 32);
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let register_offset = gpio % 32;
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@@ -170,6 +173,29 @@ pub fn set_rising_edge_detect(gpio: u8, enable: bool) {
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mmio_write(register_addr, new_val);
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}
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/// Returns with the interrupt status of an GPIO.
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///
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/// GPEDS register is used to record level and edge events on the GPIO pins.
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/// When an event is triggered by the GPIO, the corresponding bit will be set to 1.
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pub fn read_gpio_event_detect_status(id: u32) -> bool {
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let register = GPEDS_BASE + (id / 32) * 4;
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let register_offset = id % 32;
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let val = mmio_read(register) >> register_offset;
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(val & 0b1) != 0
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}
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/// Resets current interrupt status of a GPIO pin.
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pub fn reset_gpio_event_detect_status(id: u32) {
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let register = GPEDS_BASE + (id / 32) * 4;
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let register_offset = id % 32;
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mmio_write(register, 0b1 << register_offset);
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compiler_fence(Ordering::SeqCst);
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}
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// TODO: GPHEN,GPLEN,GPAREN,GPAFEN
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pub fn blink_gpio(gpio: u8, duration_ms: u64) {
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let _ = gpio_high(gpio);
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